P89LPC913 datasheet(39/66 Pages) NXP

39 / 66 page

P89LPC912_913_914_5

Product data sheet

Rev. 05 — 28 September 2007

39 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

8.16.4 Mode 3

When Timer 1 is in Mode 3 it is stopped. Timer 0 in Mode 3 forms two separate 8-bit

counters and is provided for applications that require an extra 8-bit timer. When Timer 1 is

in Mode 3 it can still be used by the serial port as a baud rate generator.

8.16.5 Mode 6 (P89LPC912, P89LPC914)

In this mode, the corresponding timer can be changed to a PWM with a full period of

256 timer clocks.

8.16.6 Timer overﬂow toggle output (P89LPC912, P89LPC914)

Timers 0 can be conﬁgured to automatically toggle the T0 output whenever a timer

overﬂow occurs. The same device pins that are used for the T0 count input is also used for

the timer toggle outputs. The port outputs will be a logic 1 prior to the ﬁrst timer overﬂow

when this mode is turned on.

8.17 RTC/system timer

The P89LPC912/913/914 devices have a simple RTC that allows a user to continue

running an accurate timer while the rest of the device is powered-down. The RTC can be

a wake-up or an interrupt source. The RTC is a 23-bit down counter comprised of a 7-bit

prescaler and a 16-bit loadable down counter. When it reaches all logic 0s, the counter will

be reloaded again and the RTCF ﬂag will be set.

On the P89LPC914 the clock source for this counter is the CPU clock (CCLK). On the

P89LPC912 and P89LPC913 devices, the clock source for this counter can either be the

CPU clock (CCLK) or the XTAL oscillator, provided that the XTAL oscillator is not being

used as the CPU clock. If the XTAL oscillator is used as the CPU clock, then the RTC will

use CCLK as its clock source.

Only power-on reset will reset the RTC and its associated SFRs to the default state.

8.18 UART (P89LPC913, P89LPC914)

The P89LPC913 and P89LPC914 devices have an enhanced UART that is compatible

with the conventional 80C51 UART except that Timer 2 overﬂow cannot be used as a

baud rate source. The P89LPC913 does include an independent Baud Rate Generator.

The baud rate can be selected from the oscillator (divided by a constant), Timer 1

overﬂow, or the independent Baud Rate Generator. In addition to the baud rate

generation, enhancements over the standard 80C51 UART include Framing Error

detection, automatic address recognition, selectable double buffering and several interrupt

options. The UART can be operated in four modes: shift register, 8-bit UART, 9-bit UART,

and CCLK/32 or CCLK/16.

8.18.1 Mode 0

Serial data enters and exits through RXD. TXD outputs the shift clock. 8 bits are

transmitted or received, LSB ﬁrst. The baud rate is ﬁxed at 1

⁄16 of the CPU clock

frequency.

P89LPC913 Datasheet(PDF) 39 Page - NXP Semiconductors

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