P89LPC913 datasheet(14/66 Pages) NXP

14 / 66 page

P89LPC912_913_914_5

Product data sheet

Rev. 05 — 28 September 2007

14 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

Table 6.

P89LPC914 pin description

Symbol

Type

Description

P0.2,

P0.4 to P0.6

I/O

Port 0: Port 0 is a 4-bit I/O port with a user-conﬁgurable output type. During reset

Port 0 latches are conﬁgured in the input only mode with the internal pull-up

disabled. The operation of Port 0 pins as inputs and outputs depends upon the port

conﬁguration selected. Each port pin is conﬁgured independently. Refer to Section

8.12.1 “Port conﬁgurations” and Table 13 “Static characteristics” for details.

The Keypad Interrupt feature operates with Port 0 pins.

All pins have Schmitt triggered inputs.

Port 0 also provides various special functions as described below:

P0.2/CIN2A/

KBI2

I/O

P0.2 — Port 0 bit 2.

CIN2A — Comparator 2 positive input A.

KBI2 — Keyboard input 2.

P0.4/CIN1A/

KBI4

I/O

P0.4 — Port 0 bit 4.

CIN1A — Comparator 1 positive input A.

KBI4 — Keyboard input 4.

P0.5/CMPREF

/ KBI5

I/O

P0.5 — Port 0 bit 5.

CMPREF — Comparator reference (negative) input.

KBI5 — Keyboard input 5.

P0.6/CMP1/

KBI6

I/O

P0.6 — Port 0 bit 6.

CMP1 — Comparator 1 output.

KBI6 — Keyboard input 6.

P1.0 to P1.2,

P1.5

I/O

(P1.0 to

P1.2);

I (P1.5)

Port 1: Port 1 is a 4-bit I/O port with a user-conﬁgurable output type, except for

three pins noted below. During reset Port 1 latches are conﬁgured in the input only

mode with the internal pull-up disabled. The operation of the conﬁgurable Port 1

pins as inputs and outputs depends upon the port conﬁguration selected. Each of

the conﬁgurable port pins are programmed independently. Refer to Section 8.12.1

“Port conﬁgurations” and Table 13 “Static characteristics” for details. P1.2 is an

open drain when used as an output. P1.5 is input only.

All pins have Schmitt triggered inputs.

Port 1 also provides various special functions as described below:

P1.0/TXD

I/O

P1.0 — Port 1 bit 0.

TXD — Transmitter output for the serial port.

P1.1/RXD

I/O

P1.1 — Port 1 bit 1.

RXD — Receiver input for the serial port.

P1.2/T0

I/O

P1.2 — Port 1 bit 2. (Open drain when used as an output.)

I/O

T0 — Timer/counter 0 external count input or overﬂow output. (Open drain when

used as outputs.)

P1.5/RST

P1.5 — Port 1 bit 5 (input only).

RST — External Reset input during Power-on or if selected via UCFG1. When

functioning as a reset input, a LOW on this pin resets the microcontroller, causing

I/O ports and peripherals to take on their default states, and the processor begins

execution at address 0. Also used during a power-on sequence to force ISP mode.

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