P89LPC913 datasheet(49/66 Pages) NXP

49 / 66 page

P89LPC912_913_914_5

Product data sheet

Rev. 05 — 28 September 2007

49 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

8.27.4 Flash programming and erasing

Different methods of erasing or programming of the ﬂash are available. The ﬂash may be

programmed or erased in the end-user application (IAP-Lite) under control of the

application’s ﬁrmware. Another option is to use the ICP mechanism. This ICP system

provides for programming through a serial clock- serial data interface using a

commercially available EPROM programmer which supports this device. This device does

not provide for direct veriﬁcation of code memory contents. Instead, this device provides a

32-bit CRC result on either a sector or the entire 1 kB of user code space.

8.27.5 In-circuit programming

ICP is performed without removing the microcontroller from the system. The ICP facility

consists of internal hardware resources to facilitate remote programming of the

P89LPC912/913/914 through a two-wire serial interface. The NXP ICP facility has made

in-circuit programming in an embedded application, using commercially available

programmers, possible with a minimum of additional expense in components and circuit

board area. The ICP function uses ﬁve pins. Only a small connector (with VDD,VSS, RST,

clock, and data signals) needs to be available to interface your application to a commercial

programmer in order to use this feature. Additional details may be found in the

P89LPC912/913/914

User manual.

8.27.6 In-application programming (IAP-Lite)

In-Application Programming is performed in the application under the control of the

microcontroller’s ﬁrmware. The IAP-Lite facility consists of internal hardware resources to

facilitate programming and erasing. The NXP In-Application Programming Lite has made

in-application programming in an embedded application possible without additional

components. This is accomplished through the use of four SFRs consisting of a

control/status register, a data register, and two address registers. Additional details may

be found in the P89LPC912/913/914

User manual.

8.27.7 Using ﬂash as data storage

The ﬂash code memory array of this device supports individual byte erasing and

programming. Any byte in the code memory array may be read using the MOVC

instruction, provided that the sector containing the byte has not been secured (a MOVC

instruction is not allowed to read code memory contents of a secured sector). Thus any

byte in a non-secured sector may be used for non-volatile data storage.

8.27.8 User conﬁguration bytes

Some user-conﬁgurable features of the P89LPC912/913/914 must be deﬁned at power-up

and therefore cannot be set by the program after start of execution. These features are

conﬁgured through the use of the ﬂash byte UCFG1. Please see the P89LPC912/913/914

User manual for additional details.

8.27.9 User sector security bytes

There are four User Sector Security Bytes, each corresponding to one sector. Please see

the P89LPC912/913/914

User manual for additional details.

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