PCA9575 datasheet(2/38 Pages) NXP

2 / 38 page

PCA9575_3

Product data sheet

Rev. 03 — 9 November 2009

2 of 38

NXP Semiconductors

PCA9575

16-bit I2C-bus and SMBus, level translating, low voltage GPIO

Power-On Reset (POR) or hardware reset pin (RESET) initializes the two banks of 8 I/Os

as inputs, sets the registers to their default values and initializes the device state machine.

The I/O banks are held in its default state when the logic supply (VDD) is off.

The PCA9575 is available in 24-pin TSSOP, 28-pin TSSOP and HWQFN24 packages,

and is speciﬁed over the

−40 °C to +85 °C industrial temperature range.

The 28-pin package provides four address select pins, allowing up to 16 PCA9575

devices to be connected with 16 different addresses on the same I2C-bus.

Features

I Separate supply rails for core logic and each of the two I/O banks provides voltage

level shifting

I 1.1 V to 3.6 V operation with level shifting feature

I Very low standby current: < 2 µA

I 16 conﬁgurable I/O pins organized as 2 banks that default to inputs at power-up

I Outputs:

N Totem pole: 1 mA source and 3 mA sink

N Independently programmable 100 kΩ pull-up or pull-down for each I/O pin

N Open-drain active LOW interrupt (INT) output pin allows monitoring of logic level

change of pins programmed as inputs

I Inputs:

N Programmable bus hold provides valid logic level when inputs are not actively

driven

N Programmable Interrupt Mask Control for input pins that do not require an interrupt

when their states change or to prevent spurious interrupts default to mask at

power-up

N Polarity Inversion register allows inversion of the polarity of the I/O pins when read

I 400 kHz I2C-bus serial interface

I Compliant with I2C-bus Standard-mode (100 kHz)

I Active LOW reset (RESET) input pin resets device to power-up default state

I GPIO All Call address allows programming of more than one device at the same time

with the same parameters

I 16 programmable slave addresses using 4 address pins (28-pin TSSOP only)

I −40 °C to +85 °C operation

I ESD protection exceeds 6000 V HBM per JESD22-A114, 500 V MM per

JESD22-A115, and 1000 V CDM per JESD22-C101

I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

I Packages offered: TSSOP28, TSSOP24, HWQFN24

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