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PCA9575 Datasheet(PDF) 12 Page - NXP Semiconductors |
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PCA9575 Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 38 page ![]() PCA9575_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 9 November 2009 12 of 38 NXP Semiconductors PCA9575 16-bit I2C-bus and SMBus, level translating, low voltage GPIO 7.6.4 Register 3 - Polarity inversion port 1 register This register allows the user to invert the polarity of the Input port register data. If a bit in this register is set (written with ‘1’), the corresponding Input port data is inverted. If a bit in this register is cleared (written with a ‘0’), the Input port data polarity is retained. 7.6.5 Register 4 - Bus-hold/pull-up/pull-down enable 0 register Bit 0 of this register allows the user to enable/disable the bus-hold feature for the I/O pins. Setting the bit 0 to logic 1 enables bus-hold feature for the I/O bank 0. In this mode, the pull-up/pull-downs will be disabled for I/O bank 0. Setting the bit 0 to logic 0 disables bus-hold feature. Bit 1 of this register allows the user to enable/disable pull-up/pull-downs on the I/O pins. Setting the bit 1 to logic 1 enables selection of pull-up/pull-down using Register 6. Setting the bit 1 to logic 0 disables pull-up/pull-downs on the I/O bank 0 pins and contents of Register 6 will have no effect on the I/O. Table 7. Register 3 - Polarity Inversion port 1 register (address 03h) bit description Legend: * default value. Bit Symbol Access Value Description 7 N1.7 R/W 0* inverts polarity of Input port 1 register data 0 = Input port 1 register data retained (default value) 1 = Input port 1 register data inverted 6 N1.6 R/W 0* 5 N1.5 R/W 0* 4 N1.4 R/W 0* 3 N1.3 R/W 0* 2 N1.2 R/W 0* 1 N1.1 R/W 0* 0 N1.0 R/W 0* Table 8. Register 4 - Bus-hold/pull-up/pull-down enable 0 register (address 04h) bit description Legend: * default value. Bit Symbol Access Value Description 7 E0.7 R/W X not used 6 E0.6 R/W X 5 E0.5 R/W X 4 E0.4 R/W X 3 E0.3 R/W X 2 E0.2 R/W X 1 E0.1 R/W 0* allows the user to enable/disable pull-up/pull-downs on the I/O bank 0 pins 0 = disables pull-up/pull-downs on the I/O bank 0 pins and contents of Register 6 will have no effect on the I/O bank 0 (default value) 1 = enables selection of pull-up/pull-down using Register 6 0 E0.0 R/W 0* allows user to enable/disable the bus-hold feature for the I/O bank 0 pins 0 = disables bus-hold feature (default value) 1 = enables bus-hold feature |
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