PCF8531 datasheet(18/44 Pages) NXP

18 / 44 page

PCF8531_4

Product data sheet

Rev. 04 — 13 June 2008

18 of 44

NXP Semiconductors

PCF8531

34 x 128 pixel matrix driver

row. After the very last address (X = 127 and Y = 4), the address pointers wrap around to

address (X = 0 and Y = 0). The Y address 5 is reserved for icon data and is not affected

by the addressing mode. Please note that in bank 4 only the LSB (DB0) of the data is

written into the RAM and in bank 5 only the 5th data bit (DB4) is written into the RAM.

Fig 8.

RAM format and addressing

mgs469

127

X address

icon data

Y address

LSB

MSB

LSB

MSB

LSB

MSB

Fig 9.

Sequence of writing data bytes into RAM with vertical addressing (V = 1)

mgs470

icon data

638

639

127

X address

Y address

Fig 10. Sequence of writing data bytes into RAM with horizontal addressing (V = 0)

mgs471

012

128

129

130

256

257

258

384

385

386

512

513

514

icon data

127

255

383

511

639

127

X address

Y address

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