12F629 datasheet(49/136 Pages) MICROCHIP

49 / 136 page

 2010 Microchip Technology Inc.

DS41190G-page 49

PIC12F629/675

8.0

DATA EEPROM MEMORY

The EEPROM data memory is readable and writable

during normal operation (full VDD range). This memory

is not directly mapped in the register file space.

Instead, it is indirectly addressed through the Special

Function Registers. There are four SFRs used to read

and write this memory:

• EECON1

• EECON2 (not a physically implemented register)

• EEDATA

• EEADR

EEDATA holds the 8-bit data for read/write, and

EEADR holds the address of the EEPROM location

being accessed. PIC12F629/675 devices have 128

bytes of data EEPROM with an address range from 0h

to 7Fh.

The EEPROM data memory allows byte read and write.

A byte write automatically erases the location and

writes the new data (erase before write). The EEPROM

data memory is rated for high erase/write cycles. The

write time is controlled by an on-chip timer. The write

time will vary with voltage and temperature as well as

from chip to chip. Please refer to AC Specifications for

exact limits.

When the data memory is code-protected, the CPU

may continue to read and write the data EEPROM

memory. The device programmer can no longer access

this memory.

Additional information on the data EEPROM is

available in the PIC® Mid-Range Reference Manual,

(DS33023).

EEDAT: EEPROM DATA REGISTER (ADDRESS: 9Ah)

EEADR: EEPROM ADDRESS REGISTER (ADDRESS: 9Bh)

R/W-0

EEDAT7

EEDAT6

EEDAT5

EEDAT4

EEDAT3

EEDAT2

EEDAT1

EEDAT0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-0

EEDATn: Byte value to write to or read from data EEPROM

U-0

R/W-0

—

EADR6

EADR5

EADR4

EADR3

EADR2

EADR1

EADR0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Should be set to ‘0’

bit 6-0

EEADR: Specifies one of 128 locations for EEPROM Read/Write Operation

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