| Electronic Components Datasheet Search |
|
56F8023 Datasheet(PDF) 73 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
56F8023 Datasheet(HTML) 73 Page - Freescale Semiconductor, Inc |
|
73 / 157 page ![]() Register Descriptions 56F8033/56F8023 Data Sheet, Rev. 6 Freescale Semiconductor 73 5.6.14.1 Reserved—Bits 15–5 This bit field is reserved. Each bit must be set to 0. 5.6.14.2 Fast Interrupt 1 Vector Address High (FIVAH1)—Bits 4–0 The upper five bits of the vector address used for Fast Interrupt 1. This register is combined with FIVAL1 to form the 21-bit vector address for Fast Interrupt 1 defined in the FIM1 register. 5.6.15 IRQ Pending Register 0 (IRQP0) Figure 5-17 IRQ Pending Register 0 (IRQP0) 5.6.15.1 IRQ Pending (PENDING)—Bits 16–2 These register bit values represent the pending IRQs for interrupt vector numbers 2 through 16. Ascending IRQ numbers correspond to ascending bit locations. • 0 = IRQ pending for this vector number • 1 = No IRQ pending for this vector number 5.6.15.2 Reserved—Bit 0 This bit field is reserved. It must be set to 1. 5.6.16 IRQ Pending Register 1 (IRQP1) Figure 5-18 IRQ Pending Register 1 (IRQP1) Base + $E 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read PENDING[16:2] 1 Write RESET 11111 1111111 1111 Base + $F 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read PENDING[32:17] Write RESET 11111 1111111 1111 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |