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56F8035 Datasheet(PDF) 49 Page - Freescale Semiconductor, Inc |
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56F8035 Datasheet(HTML) 49 Page - Freescale Semiconductor, Inc |
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49 / 161 page ![]() Peripheral Memory-Mapped Registers 56F8035/56F8025 Data Sheet, Rev. 6 Freescale Semiconductor 49 SIM_IPS2 $1A Internal Peripheral Source Select Register 2 for TMRA Reserved Table 4-14 Computer Operating Properly Registers Address Map (COP_BASE = $00 F120) Register Acronym Address Offset Register Description COP_CTRL $0 Control Register COP_TOUT $1 Time-Out Register COP_CNTR $2 Counter Register Table 4-15 Clock Generation Module Registers Address Map (OCCS_BASE = $00 F130) Register Acronym Address Offset Register Description OCCS_CTRL $0 Control Register OCCS_DIVBY $1 Divide-By Register OCCS_STAT $2 Status Register Reserved OCCS_OCTRL $5 Oscillator Control Register OCCS_CLKCHK $6 Clock Check Register OCCS_PROT $7 Protection Register Table 4-16 Power Supervisor Registers Address Map (PS_BASE = $00 F140) Register Acronym Address Offset Register Description PS_CTRL $0 Control Register PS_STAT $1 Status Register Reserved Table 4-13 SIM Registers Address Map (Continued) (SIM_BASE = $00 F100) Register Acronym Address Offset Register Description |
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