56F8035 datasheet(64/161 Pages) FREESCALE

64 / 161 page

56F8035/56F8025 Data Sheet, Rev. 6

Freescale Semiconductor

5.6.2

Interrupt Priority Register 1 (IPR1)

Figure 5-4 Interrupt Priority Register 1 (IPR1)

5.6.2.1

GPIOD Interrupt Priority Level (GPIOD IPL)—Bits 15–14

This field is used to set the interrupt priority level for the GPIOD IRQ. This IRQ is limited to priorities 0

through 2. It is disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

5.6.2.2

Reserved—Bits 13–6

This bit field is reserved. Each bit must be set to 0.

5.6.2.3

FM Command, Data, Address Buffers Empty Interrupt Priority Level

(FM_CBE IPL)—Bits 5–4

This field is used to set the interrupt priority level for the FM Command, Data Address Buffers Empty

IRQ. This IRQ is limited to priorities 0 through 2. It is disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

5.6.2.4

FM Command Complete Interrupt Priority Level (FM_CC IPL)—Bits 3–2

This field is used to set the interrupt priority level for the FM Command Complete IRQ. This IRQ is

limited to priorities 0 through 2. It is disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

Base + $1

Read

GPIOD IPL

FM_CBE IPL

FM_CC IPL

FM_ERR IPL

Write

RESET

0000

56F8035 Datasheet(PDF) 64 Page - Freescale Semiconductor, Inc

56F8035 Datasheet(HTML) 64 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL