LM26480 datasheet(20/30 Pages) NSC

20 / 30 page

Design Implementation of the Flexible Power-On Reset

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Design implementation of the flexible power-on reset. An in-

ternal power-on reset of the IC is used with EN1 and EN2 to

produce a reset signal (LOW) to the delay timer nPOR. EN1

and RDY1 or EN2 and RDY2 are used to generate the set

signal (HIGH) to the delay timer. S=R=1 never occurs. The

mask timers are triggered off EN1 and EN2 which are gated

with RDY1, and RDY2 to generate outputs to the final AND

gate to generate the nPOR.

UNDER VOLTAGE LOCK OUT

The LM26480 features an “under voltage lock out circuit”. The

function of this circuit is to continuously monitor the raw input

supply voltage (VINLDO12) and automatically disables the

four voltage regulators whenever this supply voltage is less

than 2.8 VDC.

The circuit incorporates a bandgap based circuit that estab-

lishes the reference used to determine the 2.8 VDC trip point

for a V

IN OK – Not OK detector. This VIN OK signal is then

used to gate the enable signals to the four regulators of the

LM26480. When VINLDO12 is greater than 2.8 VDC the four

enables control the four regulators, when VINLDO12 is less

than 2.8 VDC the four regulators are disabled by the V

IN de-

tector being in the “Not OK” state. The circuit has built in

hysteresis to prevent chattering occurring.

LM26480 Datasheet(PDF) 20 Page - National Semiconductor (TI)