LM26480 datasheet(16/30 Pages) NSC

16 / 30 page

30040405

SHUTDOWN MODE

During shutdown the PFET switch, reference, control and

bias circuitry of the converters are turned off. The NFET

switch will be on in shutdown to discharge the output. When

the converter is enabled, soft start is activated. It is recom-

mended to disable the converter during the system power up

and under voltage conditions when the supply is less than

2.8V.

SOFT START

The soft-start feature allows the power converter to gradually

reach the initial steady state operating point, thus reducing

startup stresses and surges. The two LM26480 buck con-

verters have a soft-start circuit that limits in-rush current dur-

ing startup. During startup the switch current limit is increased

in steps. Soft start is activated only if EN goes from logic low

to logic high after V

IN reaches 2.8V. Soft start is implemented

by increasing switch current limit in steps of 250 mA, 500 mA,

950 mA and 2A for both bucks (typ. switch current limit). The

startup time thereby depends on the output capacitor and load

current demanded at start-up.

LOW DROPOUT OPERATION

The LM26480 can operate at 100% duty cycle (no switching;

PMOS switch completely on) for low dropout support of the

output voltage. In this way the output voltage will be controlled

down to the lowest possible input voltage. When the device

operates near 100% duty cycle, output voltage ripple is ap-

proximately 25 mV. The minimum input voltage needed to

support the output voltage is

IN, MIN = ILOAD * (RDSON, PFET + RINDUCTOR) + VOUT

— ILOAD

Load current

— RDSON, PFET

Drain to source resistance of

PFET switch in the triode region

— RINDUCTOR

Inductor resistance

FLEXIBLE POWER-ON RESET (i.e., POWER GOOD WITH

DELAY)

The LM26480 is equipped with an internal Power-On-Reset

(“POR”) circuit which monitors the output voltage levels on

bucks 1 and 2. The nPOR is an open drain logic output which

is logic LOW when either of the buck outputs are below 91%

of the rising value , or when one or both outputs fall below

82% of the desired value. The time delay between output

voltage level and nPOR is enabled is (50 µs, 50 ms, 100 ms,

200 ms), 50 ms by default. For any other delay option, other

than the default, please consult a National Sales Represen-

tative. The system designer can choose the external pull-up

resistor (i.e. 100 k

Ω ) for the nPOR pin.

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