AD5755/AD5735

Preliminary Technical Data

Rev. PrG | Page 24 of 34

DAC CONTROL REGISTER

The DAC Control Register is used to configure each DAC Channel. The DAC Control Register is selected by setting bits CREG2, CREG1,

CREG0 to 0,1,0.

Table 27. Programming DAC Control Register

D15 D14 D13 D12 D11 D10 D9 D8

D7

D6

D5

D4

D3

D2 D1 D0

0

1

0

X

X

X

X

INT_ENABLE

CLR_EN OUTEN RSET

DC-DC OVRNG

R2

R1

R0

Table 28. DAC Control Register Functions

Option

Description

INT_ENABLE

Powers up the DC-DC, DAC and internal amplifiers for the selected channel. Does not enable the output.

Can only be done on a per channel basis.

CLR_EN

Per channel Clear Enable bit. Selects if this channel will clear when the CLEAR pin is activated.

CLR_EN=1, channel will clear when part is cleared.

CLR_EN=0, channel will not clear when part is cleared.

OUTEN

Enables/Disables the selected output channel

OUTEN=1, Enables channel

OUTEN=0, Disable channel

RSET

Selects internal or external current sense resistor for selected DAC channel

RSET = 0 Selects external Resistor

RSET = 1 Selects Internal Resistor

DC_DC

Powers the DC-DC on selected channel.

DC_DC = 1, Power up DC_DC

DC_DC = 0, Power down DC_DC

This allows per channel DC_DC power up/down. To power down the DCDC, OUTEN and INT_ENABLE

bits must also be set to 0.

All DC-DCs can also be powered up simultaneously using DCDC_All bit in the Main Control Register.

OVRNG

OVRNG=1, Enabled

OVRNG=0, Disabled

R2,R1,R0

Selects output range enabled.

R2 R1 R0 Output Range Selected

0

0

0

0 to 5V Voltage Range

0

0

1

0 to 10V Voltage Range

0

1

0

±5V Voltage Range

0

1

1

±10V Voltage Range

1

0

0

4 to 20 mA Current Range

1

0

1

0 to 20 mA Current Range

1

1

0

0 to 24 mA Current Range

SOFTWARE REGISTER

The Software Register has three functions. It allows the user to perform a software reset to the part. It can be used to set bit D11 in the

Status Register. Lastly it is also used as part of the watchdog feature to ensure that the SPI interface connections are working properly. To

ensure all the datapath lines are working properly (i.e. SDI/SCLK/SYNC), the user must write 0x195 to the Software Register within the

timeout period. If this command is not received within the timeout period, the ALERT pin will signal a fault condition. Note. This is only

required when the Watchdog Timer function is enabled.

Table 29. Programming the Software Register

To program a software reset you need to write 1,0,0 to CREG2, CREG1, CREG0.

MSB

LSB

D15

D14

D13

D12

D11 to D0

1

0

0

User Program Bit

RESET CODE/SPI CODE