©2010 Silicon Storage Technology, Inc.

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1.8V Serial Quad I/O (SQI) Flash Memory

SST26WF032

Advance Information

Reset Quad I/O (RSTQIO)

The Reset Quad I/O instruction, FFH, resets the device to 1-bit SPI protocol operation. To execute a

Reset Quad I/O operation, the host drives CE# low, sends the Reset Quad I/O command cycle (FFH)

then, drives CE# high. The device accepts either SPI (8 clocks) or SQI (2 clocks) command cycles. For

High-Speed Read (80 MHz)

The High-Speed Read instruction, 0BH, is supported in both SPI bus protocol and SQI protocol. On

power-up, the device is set to use SPI.

Initiate High-Speed Read by executing an 8-bit command, 0BH, followed by address bits [A23-A0] and

a dummy byte. CE# must remain active low for the duration of the High-Speed Read cycle. SIO2 and

sequence for SPI bus protocol.

Figure 10:High-Speed Read Sequence (SPI)

In SQI protocol, the host drives CE# low then send the Read command cycle command, 0BH, followed by three

address cycles and two dummy cycles. Each cycle is two nibbles (clocks) long, most significant nibble first.

After the dummy cycles, the 1.8V Serial Quad I/O (SQI) Flash Memory outputs data on the falling

edge of the SCK signal starting from the specified address location. The device continually streams

data output through all addresses until terminated by a low-to-high transition on CE#. The internal

address pointer automatically increments until the highest memory address is reached, at which point

the address pointer returns to address location 000000H.

During this operation, blocks that are Read-locked will output data 00H.

Figure 11:High-Speed Read and Read Burst Sequence (SQI)

1409 F31.0

CE#

SO/SIO1

SI/SIO0

SCK

ADD.

012 3 4 5 6 7 8

ADD.

ADD.

0B

HIGH IMPEDANCE

15 16

23 24

31 32

39 40

47 48

55 56

63 64

N+2

N+3

N+4

N

N+1

X

MSB

MODE 0

MODE 3

80

71 72

Address

Dummy

Command

Data Byte 0

MSN

LSN

Data Byte 8 Data Byte 9

1409 F44.1

01

2

SCK

SIO(3:0)

CE#

C1

C0

A5

A4

A3

A2

A1

A0

X

H0

X

X

X

L0

H8

L8

H9

L9

78

11

10

913

12

19

18

21

20

MODE 3

MODE 0

34

5

6

Note: MSN= Most Significant Nibble, LSN = Least Significant Nibble