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MAX6876 Datasheet(PDF) 13 Page - Maxim Integrated Products

Part # MAX6876
Description  EEPROM-Programmable, Quad, Power-Supply Tracker/Sequencer Circuit
PDF  39 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX6876 Datasheet(HTML) 13 Page - Maxim Integrated Products

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EEPROM-Programmable, Quad,
Power-Supply Tracker/Sequencer Circuit
______________________________________________________________________________________
13
Pin Description (continued)
PIN
NAME
FUNCTION
32
GATE2
Gate Drive for External n-Channel FETs. GATE2 begins enhancing the external n-channel FETs when
all monitored inputs are within their selected thresholds (0.5V to 5.5V), at least one IN_ input or VCC is
above the minimum operating voltage, VTRKEN > 1.285V threshold, and the ENABLE input is logic
high. During power-up mode, GATE_ voltages are enhanced with internal control loops forcing all
OUT_ voltages to track the reference ramp (SYNCH) at a programmed slew rate. An internal charge
pump boosts GATE2 to VIN2 + 5V to fully enhance the external n-channel FET when power-up is
complete.
33
IN2
Supply Voltage and Tracked Input Voltage. Nominal supply range is 0.5V to 5V. IN1, IN2, IN3, IN4, or
VCC must be greater than the internal UVLO (VABP = 2.7V) to enable the tracking functionality. IN2 is
monitored with internally selected thresholds to ensure all supplies have stabilized before tracking (or
sequencing) is enabled.
34
OUT1
Monitored Output Voltage. Each OUT1 is monitored to control the supply slew rate and tracking
performance. OUT1–OUT4 begin to track up after the internal supply (ABP) exceeds the minimum
voltage requirements, VTRKEN > 1.285V threshold, ENABLE is logic high, and IN1–IN4 are all within
their selected thresholds. The OUT1 output falls out of the tracking equation as OUT1 approaches
IN1; other OUT_ supplies continue tracking up without signaling a system fault. OUT_ outputs are
tracked down during power-off conditions.
35
GATE1
Gate Drive for External n-Channel FETs. GATE1 begins enhancing the external n-channel FETs when
all monitored inputs are within their selected thresholds (0.5V to 5.5V), at least one IN_ input or VCC is
above the minimum operating voltage, VTRKEN > 1.285V threshold, and the ENABLE input is logic
high. During power-up mode, GATE_ voltages are enhanced with internal control loops forcing all
OUT_ voltages to track the reference ramp (SYNCH) at a programmed slew rate. An internal charge
pump boosts GATE1 to VIN1 + 5V to fully enhance the external n-channel FET when power-up is
complete.
36
IN1
Supply Voltage and Tracked Input Voltage. Nominal supply range is 0.5V to 5V. IN1, IN2, IN3, IN4, or
VCC must be greater than the internal UVLO (VABP = 2.7V) to enable the tracking functionality. IN1 is
monitored with internally selected thresholds to ensure all supplies have stabilized before tracking (or
sequencing) is enabled.
—
EP
Exposed Paddle. Exposed paddle is internally connected to GND.
Detailed Description
The MAX6876 EEPROM-configurable, multivoltage
power tracker/supervisor monitors four system voltages
and ensures proper power-up and power-down condi-
tions for systems requiring voltage tracking and/or
sequencing. The MAX6876 provides a highly config-
urable solution as key thresholds and timing parame-
ters are programmed through an I2C interface and
these values are stored in internal EEPROM. In addition
to tracking and sequencing voltages, the MAX6876
also provides supervisory functions as well as an over-
current detection circuit.
The MAX6876 features programmable undervoltage
and overvoltage thresholds for each input supply. The
thresholds are EEPROM configured in 10mV (0.5V to
3.05V) or 20mV (1.0V to 5.5V) increments. When all of
the voltages are within their specifications, the device
turns on the external n-channel MOSFETs to either
sequence or track the voltages to the system. All of the
voltages can be sequenced or tracked or powered up
with a combination of the two options. During voltage
tracking, the voltage at the GATE of each MOSFET is
increased to slowly turn on each OUT_. The GATE
delay is EEPROM-selectable from 25µs to 1.6s. The



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