81341 datasheet(9/89 Pages) INTEL

9 / 89 page

December 2007

Datasheet

Order Number: 315038-003US

Features—Intel® 81341 and 81342

2.0

Features

81341 and 81342 I/O Processors are a single- or dual-function PCI device that

integrates one or two Intel XScale® processor(s) with intelligent peripherals including a

PCI bus bridge. The 81341 and 81342 I/O Processors also support two internal busses:

North XSI bus and South XSI bus. With the two internal busses, transactions can take

place simultaneously on each bus. The north XSI bus provides one or two Intel XScale®

processor(s) with low-latency access to either the DDR2 SDRAM Memory Controller or

the on-chip SRAM Memory Controller. Peripherals that generate large burst transactions

are located on the south XSI bus, thus allowing the two Intel XScale® processors

exclusive access to the north XSI bus.

81341 and 81342 I/O Processors consolidate the following features into a single

system:

• PCI–Local Memory Bus Address Translation Unit, function 0 programming interface

• Messaging Unit, function 0 programming interface

• Application Direct Memory Access (DMA) Controller (including offload for up to a

16-source XOR operation)

• Peripheral Bus Interface Unit

• Integrated DDR2 Memory Controller

• Integrated SRAM Memory Controller

• Two programmable timers per Intel XScale® processor

• Watchdog timer per Intel XScale® processor

• Three I2C Bus Interface Units

• Two Serial Port Units

• Sixteen General-Purpose Input/Output (GPIO) ports

• Internal North Bus–South Bus Bridge

It is an integrated processor that addresses the needs of intelligent I/O storage

applications and helps reduce intelligent I/O system costs.

2.1

Intel® 81341 and 81342 I/O Processors Features

Figure 1 shows the Intel® 81341 I/O Processor single-processor block diagram.

Figure 2 shows the Intel® 81342 I/O Processor two-processor block diagram.

81341 Datasheet(PDF) 9 Page - Intel Corporation