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81341 Datasheet(PDF) 32 Page - Intel Corporation

Part # 81341
Description  I/O Processors
PDF  89 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

81341 Datasheet(HTML) 32 Page - Intel Corporation

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Intel® 81341 and 81342—Package Information
Datasheet
December 2007
32
Order Number: 315038-003US
CLK_SRC_PCIE#
1
Reset
Strap
Clock Source PCI-E: Selects PCI Express* Refclk pair as the
input clock to the PLLs that control most internal logic.
0 = Source clock is
REFCLKP/REFCLKN
1 = Source clock is
P_CLKIN (default mode)
Note: When P_CLKO[3:0] are used this pin must be
pulled low.
Note: Muxed onto signal PWE#
Total
25
Reset strap signals are latched on the rising edge of
P_RST#. All reset strap signals are internally pulled to
logic 1 by default. An external 4.7K ohm 5%, 1/16 W pull-down resistor is required to force a logic 0 on these
pins.
Table 12. Reset Strap Signals (Sheet 3 of 3)
Name
Count
Type
Description



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