R8CL3AB datasheet(68/89 Pages) RENESAS

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5. Electrical Characteristics

REJ03B0243-0030 Rev.0.30

Jan 21, 2009

Page 66 of 76

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

5.5

AC Characteristics

Note:

1tCYC = 1/f1(s)

Table 5.24

Timing Requirements of Clock Synchronous Serial I/O with Chip Select

(VCC = 1.8 to 5.5 V, VSS = 0 V, and Topr =

−20 to 85°C (N version) / −40 to 85°C

(D version), unless otherwise specified.)

Symbol

Parameter

Conditions

Standard

Unit

Min.

Typ.

Max.

tSUCYC

SSCK clock cycle time

−−

tCYC (1)

tHI

SSCK clock “H” width

0.4

−

0.6

tSUCYC

tLO

SSCK clock “L” width

0.4

−

0.6

tSUCYC

tRISE

SSCK clock rising

time

Master

−−

tCYC (1)

Slave

−−

µs

tFALL

SSCK clock falling

time

Master

−−

tCYC (1)

Slave

−−

µs

tSU

SSO, SSI data input setup time

100

−−

SSO, SSI data input hold time

−−

tCYC (1)

tLEAD

SCS setup time

Slave

1tCYC + 50

−−

tLAG

SCS hold time

Slave

1tCYC + 50

−−

tOD

SSO, SSI data output delay time

−−

tCYC (1)

tSA

SSI slave access time

2.7 V

≤ VCC ≤ 5.5 V

−−

1.5tCYC + 100

1.8 V

≤ VCC < 2.7 V

−−

1.5tCYC + 200

tOR

SSI slave out open time

2.7 V

≤ VCC ≤ 5.5 V

−−

1.5tCYC + 100

1.8 V

≤ VCC < 2.7 V

−−

1.5tCYC + 200

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