R8CL3AB datasheet(79/89 Pages) RENESAS

79 / 89 page

A - 1

REVISION HISTORY

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group Datasheet

Rev.

Date

Description

Page

Summary

0.01

May 19, 2008

−

First Edition issued

0.02

Jul 10, 2008

Table 1.4

CPU Specification: Minimum instruction execution time revised

DTC Specification: Activation sources 33

→38

Table 1.5

R8C/L35A, R8C/L35B Groups: Specification revised

Table 1.6

Operating Frequency/Supply Voltage: Specification revised

6 to 13

Table 1.7 to Table 1.14

Current of May 2008

→Current of Jul 2008

10 to 11 Table 1.11 and Table 1.12 (P)

→(D)

Table 1.15

WKUP1

→WKUP1(3)

Table 4.1

RSTFR: 0XXX00XXb

→XXXX00XXb

POMCR0: 00h

→XX0000XXb

Table 4.2

0072h Voltage monitor 1/Compare A1 interrupt Control Register

→Voltage monitor 1/Comparator A1 interrupt Control Register

0073h Voltage monitor 2/Compare A2 interrupt Control Register

→Voltage monitor 2/Comparator A2 interrupt Control Register

Table 4.5

TRECR1: XXX0X0XXb

→XXXXX0XXb

Table 4.7

0194h

SS Transmit Data Register

→SS Transmit Data Register L

0195h

SS Transmit Data Register SSTDR

→SS Transmit Data Register H SSTDRH

0196h

SS Receive Data Register

→SS Receive Data Register L

IIC bus Shift Register ICDRS deleted

0197h

SS Receive Data Register SSRDR

→SS Receive Data Register H SSRDRH

Table 4.8

01E0h to 01E7h: FFh

→00h

0.10

Jul 30, 2008

Table 1.4

Watchdog Timer: Specification 15 bits

→14 bits

Table 1.6

Flash Memory: Function R8C/L36B Group

→R8C/L36A Group

14 to 17 Figure 1.9 to Figure 1.12

Watchdog Timer 15 bits

→14 bits

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group Datasheet

REVISION HISTORY

R8CL3AB Datasheet(PDF) 79 Page - Renesas Technology Corp

R8CL3AB Datasheet(HTML) 79 Page - Renesas Technology Corp

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