IR3502

Page 11 of 39

July 28, 2009

PHASE IC

CLOCK

PULSE

EAIN

VDAC

PWMRMP

GATEH

GATEL

STEADY-STATE

OPERATION

DUTY CYCLE DECREASE

DUE TO VIN INCREASE

(FEED-FORWARD)

DUTY CYCLE INCREASE

DUE TO LOAD

INCREASE

STEADY-STATE

OPERATION

DUTY CYCLE DECREASE DUE TO LOAD

DECREASE (BODY BRAKING) OR FAULT

(VCCLUV, OCP, VID=11111X)

Figure 5 PWM Operating Waveforms

Body Braking

TM

In a conventional synchronous buck converter, the minimum time required to reduce the current in the inductor in

response to a load step decrease is;

O

MIN

MAX

SLEW

V

I

I

L

T

)

(

*

−

=

The slew rate of the inductor current can be significantly increased by turning off the synchronous rectifier in

response to a load step decrease. The switch node voltage is then forced to decrease until conduction of the

synchronous rectifier’s body diode occurs. This increases the voltage across the inductor from Vout to Vout +

decrease is now;

BODYDIODE

O

MIN

MAX

SLEW

V

V

I

I

L

T

+

−

=

)

(

*

Since the voltage drop in the body diode is often comparable to the output voltage, the inductor current slew rate

can be increased significantly. This patented technique is referred to as “body braking” and is accomplished through

the “body braking comparator” located in the phase IC. If the error amplifier’s output voltage drops below the output

voltage of the share adjust amplifier in the phase IC, this comparator turns off the low side gate driver, enabling the

bottom FET body diode to take over. There is 100mV upslope and 200mV down slope hysteresis for the body

braking comparator.

Lossless Average Inductor Current Sensing

Inductor current can be sensed by connecting a series resistor and a capacitor network in parallel with the inductor

and measuring the voltage across the capacitor, as shown in Figure 6. The equation of the sensing network is,

CS

CS

L

L

CS

CS

L

C

C

sR

sL

R

s

i

C

sR

s

v

s

v

+

+

=

+

=

1

)

(

1

1

)

(

)

(

Usually the resistor Rcs and capacitor Ccs are chosen, such that, the time constant of Rcs and Ccs equals the time

voltage across Ccs is proportional to the current through L, and the sense circuit can be treated as if only a sense