TLE5011 datasheet(33/43 Pages) INFINEON

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TLE5011

Specification

Final Data Sheet

V1.1, 2010-05

3.9.7

CRC Generation

These are the requirements for CRC generation:

•

This CRC is defined according to the J1850 Bus-Specification of 15.Feb.1994 for Class B Data

Communication.

•

Every new transfer resets the CRC generation.

•

Every Byte of a transfer will be taken into account to generate the CRC [also the sent command(s)].

•

Generator Polynomial: X8+X4+X3+X2+1, the fast CRC generation circuit, is used for CRC generation.

(See Figure 15)

•

The remainder of the fast CRC circuit is initially set to 11111111

•

The remainder is bit-inverted before transmission.

Figure 15 shows the fast CRC Polynomial.

The zero extension for initial CRC calculation is included!

Figure 15

Fast CRC Polynomial Division Circuit

3.9.8

Slave-active Byte Generation

The position of the 0 in a nibble corresponds to the given slave number.

The slave-active Byte (cccc_nnnn) consists of:

•

low nibble (nnnn). One 0 is generated always according to the slave number.

•

high nibble (cccc). The 0 is only generated, if the readback CRC is correct.

Slave1: S_NO = 0

bit 0 is pulled low Slave-active Byte: 1110_1110

Slave2: S_NO = 1

bit 1 is pulled low Slave-active Byte: 1101_1101

Slave3: S_NO = 2

bit 2 is pulled low Slave-active Byte: 1011_1011

Slace4: S_NO = 3

bit 3 is pulled low Slave-active Byte: 0111_0111

Example of a communication disturbed by other bus participants:

Slave1: S_NO = 0

bit 0 is pulled low, but the high nibble remains as ’1111’.

> Slave-active Byte: 1111_1110

xor

Input

Serial

CRC

output

TX_CRC

xor

parallel Remainder

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