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F71869 Datasheet(PDF) 16 Page - Feature Integration Technology Inc.

Part # F71869
Description  Super I/O Hardware Monitor
PDF  116 Pages
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Manufacturer  FINTEK [Feature Integration Technology Inc.]
Direct Link  http://www.fintek.com.tw/eng
Logo FINTEK - Feature Integration Technology Inc.

F71869 Datasheet(HTML) 16 Page - Feature Integration Technology Inc.

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Fintek
Feature Integration Technology Inc.
2009
V1.1
15
F71869
PCI_RST4#
O12-5v
It is an output buffer of LRESET#. This function is selected
by register setting.
IBX_SCL
I/OD125v
INTEL IBex PEAK platform hardware monitor interface clock
output. This function is selected by register setting.
GPIO11
I/OOD12st5
Default General Purpose IO.
PCI_RST5#
O12-5v
It is an output buffer of LRESET#. This function is selected
by register setting.
60
IBX_SDA
I/OD125v
VSB
INTEL IBex PEAK platform hardware monitor interface input.
This function is selected by register setting.
GPIO12
I/OOD12st5v
Default General Purpose IO.
RSTCON#
INst5v
It is an output buffer of RSTCON#. This function is selected
by register setting.
61
FANCTL1
OOD12-5v
AOUT
VSB
Fan 1 control output. This pin provides PWM duty-cycle
output or a voltage output. This function is selected by
register setting.
GPIO15
I/OOD12st5v
Default General Purpose IO.
LED_VSB
OD12-5v
Power LED for VSB. This function is selected by register
setting.
64
ALERT#
OD12-5v
VSB
Alert a signal when temperature over limit setting. This
function is selected by register setting.
GPIO16
I/OOD12st5v
Default General Purpose IO.
65
LED_VCC
OD12-5v
VSB
Power LED for VCC. This function is selected by register
setting.
CPU_PWRGD
OD12-5v
CPU Power Good signal output
(Detected by VIN1~VIN4 level good)
66
GPIO15
I/OOD12st5v
VSB
General Purpose IO. GPIO function is selected by register
setting
74
PCIRST1#
OD12-5v
VSB
It is an output buffer of LRESET#.
75
PCIRST2#
O12-5v
VSB
It is an output buffer of LRESET#.
76
PCIRST3#
O12-5v
VSB
It is an output buffer of LRESET#.
77
S5#
INst5v-u47k
VSB
S5# signal input.
GPIO44
I/OOD12st5v
Default General Purpose IO.
78
ATXPG_IN
INst5v
VSB
ATX Power Good input.
84
PWROK
OD12-5v
VBAT
PWROK function, It is power good signal of VCC, which is
delayed 400ms (default) as VCC arrives at 2.8V.
80
PWSIN#
INts5v
VSB
Main power switch button input.
81
PWSOUT#
OD12-5v-u47k
VSB
Panel Switch Output. This pin is low active and pulse output.
It is power on request output#.
82
S3#
INst5v-u47k
VSB
S3# Input is Main power on-off switch input.
83
PS_ON#
OD12-5v
VSB
Power supply on-off control output. Connect to ATX power
supply PS_ON# signal.
85
RSMRST#
OD12-5v-u10k
VBAT
Resume Reset# function, It is power good signal of VSB,
which is delayed 66ms as VSB arrives at 2.8V.
87
COPEN#
INst5v
VBAT
Case Open Detection #. This pin is connected to a specially
designed low power CMOS flip-flop backed by the battery for
case open state preservation during power loss.



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