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F71869 Datasheet(PDF) 18 Page - Feature Integration Technology Inc. |
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F71869 Datasheet(HTML) 18 Page - Feature Integration Technology Inc. |
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18 / 116 page ![]() Fintek Feature Integration Technology Inc. 2009 V1.1 17 F71869 GPIO04 OD12-5v General Purpose IO. GPIO function is selected by register setting ST1 OD12 Status Pin1 for S0#/S3#/S5# states application. (Default function) In S0# ST1 pin status is Tri-state. In S3# ST1 pin status is Low level. In S5# ST1 pin status is Tri-state. GPIO03 I/OOD12st5v General Purpose IO. GPIO function is selected by register setting 56 WDTRST# OD12-5v VSB Watch dog timer signal output. ATX_ PWRGDSW OD24-5v ATX_PWRGDSW for S0#/S3#/S5# states application. In S0# ATX_PWRGDSW pin status is Low-state. In S3# ATX_PWRGDSW pin status is Tri-state. In S5# ATX_PWRGDSW pin status is Tri-state, and can be programmed Low-state. GPIO13 I/OOD24st5v General Purpose IO. GPIO function is selected by register setting 62 BEEP OD24-5v VSB Beep pin. 4.9 KBC Function Pin No. Pin Name Type PWR Description 40 KBRST# OD16-5v-u10k VCC Keyboard reset. This pin is high after system reset. Internal pull high 3.3V with 10k ohms. (KBC P20) 41 GA20 OD16-5v-u10k VCC Gate A20 output. This pin is high after system reset. Internal pull high 3.3V with 10k ohms. (KBC P21) 69 KDATA I/OD16st5V VSB Keyboard Data. 70 KCLK I/OD16st5V VSB Keyboard Clock. 71 MDATA I/OD16st5V VSB PS2 Mouse Data. 72 MCLK I/OD16st5V VSB PS2 Mouse Clock. |
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