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AD9284 Datasheet(PDF) 16 Page - Analog Devices

Part # AD9284
Description  8-Bit, 250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9284 Datasheet(HTML) 16 Page - Analog Devices

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AD9284
Rev. 0 | Page 16 of 24
SERIAL PORT INTERFACE (SPI)
The AD9284 serial port interface (SPI) allows the user to configure
the converter for specific functions or operations through a
structured register space provided inside the ADC. The SPI
gives the user added flexibility and customization, depending
on the application. Addresses are accessed via the serial port
and can be written to or read from via the port. Memory is
organized into bytes that can be further divided into fields,
which are documented in the Memory Map section. For detailed
operational information, see the AN-877 Application Note,
Interfacing to High Speed ADCs via SPI.
CONFIGURATION USING THE SPI
Three pins define the SPI of this ADC: SCLK, SDIO, and CSB
(see Table 9). SCLK (a serial clock) is used to synchronize the
read and write data presented from and to the ADC. SDIO
(serial data input/output) is a dual-purpose pin that allows data
to be sent to and read from the internal ADC memory map
registers. CSB (chip select bar) is an active low control that
enables or disables the read and write cycles.
Table 9. Serial Port Interface Pins
Pin
Function
SCLK
Serial clock. A serial shift clock input that is used to
synchronize serial interface reads and writes.
SDIO
Serial data input/output. A dual-purpose pin that
typically serves as an input or an output, depending
on the instruction being sent and the relative position
in the timing frame.
CSB
Chip select bar. An active low control that gates the
read and write cycles.
The falling edge of CSB, in conjunction with the rising edge of
SCLK, determines the start of the framing. An example of the
serial timing and its definitions can be found in Figure 25.
Other modes involving CSB are available. The CSB pin can be
held low indefinitely, which permanently enables the device;
this is called streaming. CSB can stall high between bytes to
allow for additional external timing. When the CSB pin is tied
high, SPI functions are placed in high impedance mode. This
mode turns on any SPI pin secondary functions.
During the instruction phase, a 16-bit instruction is transmitted.
Data follows the instruction phase, and its length is determined
by the W0 and W1 bits, as shown in Figure 25.
All data is composed of 8-bit words. The first bit of the first byte
in a multibyte serial data transfer frame indicates whether a read
command or a write command is issued. This allows the serial
data input/output (SDIO) pin to change direction from an input
to an output at the appropriate point in the serial frame.
In addition to word length, the instruction phase determines
whether the serial frame is a read or write operation, allowing
the serial port to be used both to program the chip and to read
the contents of the on-chip memory. If the instruction is a readback
operation, the serial data input/output (SDIO) pin changes
direction, from an input to an output, at the appropriate point in
the serial frame.
Data can be sent in MSB-first mode or in LSB-first mode. MSB
first is the default on power-up and can be changed via the SPI
port configuration register. For more information about this
and other features, see the AN-877 Application Note, Interfacing
to High Speed ADCs via SPI.
DON’T CARE
DON’T CARE
DON’T CARE
DON’T CARE
SDIO
SCLK
CSB
tS
tDH
tCLK
tDS
tH
R/W
W1
W0
A12
A11
A10
A9
A8
A7
D5
D4
D3
D2
D1
D0
tLOW
tHIGH
Figure 25. Serial Port Interface Timing Diagram



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