PCF2123 datasheet(25/63 Pages) NXP

25 / 63 page

PCF2123

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Product data sheet

Rev. 5 — 27 April 2011

25 of 63

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

8.7 Interrupt output

An active LOW interrupt signal is available at pin INT. Operation is controlled via the bits

of register Control_2. Interrupts may be sourced from four places: second and minute

timer, countdown timer, alarm function or offset function.

With bit TI_TP, the timer generated interrupts can be configured to either generate a pulse

or to follow the status of the interrupt flags (bits TF and MSF). Correction interrupt pulses

are always 1

⁄

128 second long. Alarm interrupts always follow the condition of AF.

Remark: Note that the interrupts from the four sources are wired-OR, meaning they will

mask one another (see Figure 16).

When bits SI, MI, TIE, AIE, and CIE are all disabled, pin INT will remain high-impedance.

Fig 16. Interrupt scheme

001aai555

SECONDS COUNTER

MSF: MINUTE

SECOND FLAG

CLEAR

SET

PULSE

GENERATOR 1

CLEAR

TRIGGER

MINUTES COUNTER

COUNTDOWN COUNTER

from interface:

clear MSF

to interface:

read MSF

AF: ALARM

FLAG

CLEAR

SET

to interface:

read AF

TF: TIMER

CLEAR

SET

PULSE

GENERATOR 2

CLEAR

TRIGGER

TIE

INT

from interface:

clear TF

from interface:

clear AF

set alarm

flag, AF

offset circuit: add/substract

1/64 Hz pulse

to interface:

read TF

TI_TP

AIE

E.G.AIE

PULSE

GENERATOR 3

CLEAR

TRIGGER

CIE

from interface:

set CIE

PCF2123 Datasheet(PDF) 25 Page - NXP Semiconductors

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