AD6649EBZ datasheet(21/40 Pages) AD

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AD6649

Rev. 0 | Page 21 of 40

DIGITAL OUTPUTS

The AD6649 output drivers can be configured for either ANSI

LVDS or reduced drive LVDS using a 1.8 V DRVDD supply.

As detailed in the AN-877 Application Note, Interfacing to High

Speed ADCs via SPI, the data format can be selected for offset

binary, twos complement, or gray code when using the SPI

control.

Digital Output Enable Function (OEB)

The AD6649 has a flexible three-state ability for the digital

output pins. The three-state mode is enabled using the OEB pin

or through the SPI interface. If the OEB pin is low, the output

data drivers are enabled. If the OEB pin is high, the output data

drivers are placed in a high impedance state. This OEB function

is not intended for rapid access to the data bus. Note that OEB

is referenced to the digital output driver supply (DRVDD) and

should not exceed that supply voltage.

When using the SPI interface, the data and fast detect outputs of

each channel can be independently three-stated by using the

output enable bar bit (Bit 4) in Register 0x14. Because the

output data is interleaved, if only one of the two channels is

disabled, the data of the remaining channel is repeated in both

the rising and falling output clock cycles.

Timing

The AD6649 provides latched data with a pipeline delay of 23 or 43

input sample clock cycles, depending on the mode of operation.

Data outputs are available one propagation delay (tPD) after the

rising edge of the clock signal.

The length of the output data lines and loads placed on them

should be minimized to reduce transients within the AD6649.

These transients can degrade converter dynamic performance.

The lowest typical conversion rate of the AD6649 is 40 MSPS. At

clock rates below 40 MSPS, dynamic performance may degrade.

Data Clock Output (DCO)

The AD6649 also provides data clock output (DCO) intended

for capturing the data in an external register. Figure 2 shows a

graphical timing diagram of the AD6649 output modes.

Table 10. Output Data Format

Input (V)

VIN+ − VIN−,

Input Span = 1.75 V p-p (V)

Offset Binary Output Mode

Twos Complement Mode (Default)

VIN+ − VIN–

<–0.875

00 0000 0000 0000

10 0000 0000 0000

VIN+ − VIN–

–0.875

00 0000 0000 0000

10 0000 0000 0000

VIN+ − VIN–

10 0000 0000 0000

00 0000 0000 0000

VIN+ − VIN–

+0.875

11 1111 1111 1111

01 1111 1111 1111

VIN+ − VIN–

>+0.875

11 1111 1111 1111

01 1111 1111 1111

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