AD6649EBZ datasheet(23/40 Pages) AD

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AD6649

Rev. 0 | Page 23 of 40

NUMERICALLY CONTROLLED OSCILLATOR (NCO)

FREQUENCY TRANSLATION

This processing stage comprises a digital tuner consisting of

a 32-bit complex numerically controlled oscillator (NCO). The

NCO is always enabled. This NCO block accepts a real input

from the ADC stage and outputs a frequency translated

complex (I and Q) output.

The NCO frequency is programmed in Register 0x52 through

unsigned frequency programming word. Frequencies between

−CLK/2 and +CLK/2 are represented using the following

frequency words:

•

0x80000000 represents a frequency given by −CLK/2.

•

0x00000000 represents dc (frequency = 0 Hz).

•

0x7FFFFFFF represents CLK/2 − CLK/232.

Use the following equation to calculate the NCO frequency:

CLK

Mod

NCO_FREQ

)

(

where:

NCO_FREQ is a 32-bit twos complement number representing

the NCO frequency register.

f is the desired carrier frequency in hertz.

fCLK is the AD6649 ADC clock rate in hertz.

NCO SYNCHRONIZATION

The AD6649 NCOs within a single part or across multiple parts

can be synchronized using the external SYNC input. Bit 0 and

Bit 1 of Register 0x58 allow the NCO to be resynchronized on

every SYNC signal or only on the first SYNC signal after the

the programmed phase offset value.

NCO AMPLITUDE AND PHASE DITHER

The NCO block contains amplitude and phase dither to improve

the spurious performance. Amplitude dither improves perfor-

mance by randomizing the amplitude quantization errors within

the angular-to-Cartesian conversion of the NCO. This option

reduces spurs at the expense of a slightly raised noise floor. With

amplitude dither enabled, the NCO has an SNR of greater than

93 dB and an SFDR of greater than 115 dB. With amplitude dither

disabled, the SNR is increased to greater than 96 dB at the cost

of SFDR performance, which is reduced to 100 dB. The NCO

amplitude and phase dither are recommended and can be enabled

by setting Bit 1 and Bit 2 in Register 0x51.

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