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ACS401 Datasheet(PDF) 3 Page - Semtech Corporation |
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ACS401 Datasheet(HTML) 3 Page - Semtech Corporation |
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3 / 8 page ![]() Example: To generate a 38.4 kbps dual channel. Select a 64 kbps dual channel using the data rate selection pins DR4/3/2/1 = 1/1/0/0, and use a XTAL frequency of: XTAL = (38.4 / 64) * 9.216 MHz = 5.5296 MHz. Other ‘non-standard’ transmission frequencies may be generated in the same way as long as the 1 - 12 MHz XTAL oscillator range is observed. A wider range of external clock frequencies may also be permissible - please check with Acapella. Cint Capacitor - CNT For a XTAL frequency range of 5 - 12 MHz the ACS401 requires a ceramic capacitor of value 22 nF - 33 nF +/- 20 % between pin CNT and GND. At frequencies lower than 5 MHz a capacitor of value 68 nF - 100 nF is recommended. It is essential that the CNT capacitor is placed very close to the ACS401. DCDB The Data Carrier Detect (DCDB) signal will go Low when the modems are locked and ready for data transmission. Prior to lock (DCDB = High), the data channels outputs RxD(1:4) are forced Low with the control lines XO(1:2) forced High. Data Rate Selection The following data rates apply to TxD1, TxD2, TxD3 and TxD4 and are based on the use of a 9.216 MHz XTALor clock. ‘Standard’ mode, DR4 = 1: No. of DR4 DR3 DR2 DR1 Data Rate Channels 1 0 0 0 128 kbps Single 1 0 0 1 64 kbps Single 1 0 1 0 32 kbps Single 1 0 1 1 16 kbps Single 1 1 0 0 64 kbps Dual 1 1 0 1 32 kbps Dual 1 1 1 0 32 kbps Four 1 1 1 1 16 kbps Four ‘Double’mode, DR4 = 0: No. of DR4 DR3 DR2 DR1 Data Rate Channels 0 0 0 1 64 kbps Single 0 0 1 0 32 kbps Single 0 0 1 1 16 kbps Single 0 1 0 1 32 kbps Dual 0 0 0 0 16 kbps Dual 0 1 1 1 16 kbps Four In ‘standard’ mode internal timing accommodates fiber length delays of up to 95 km, link budget permitting. In ‘double’mode the internal timing accommodates fiber length delays of up to 190 km, link budget permitting. ‘Double’ mode essentially halves the frequency of the internal clock and therefore doubles the period of the internal machine cycle, this also has the effect of doubling the duration of LED/LASER transmit pulses, which in turn is likely to lead to improved link budgets, particularly where LEDs or LASERs of higher than recommended capacitance are employed. Bandwidth * Channel Product The ACS401 has a Bandwidth Channel Product (BCP) of 128 kHz in ‘standard’ mode and 64 kHz in ‘double’ mode using the recommended XTAL frequency of 9.216 MHz. The BCP is proportional to the XTAL frequency and is specified as: BCP(kHz) = 128 * XTAL / ( 9.216 *10 6 * n) XTAL = frequency of XTALoscillator. n = 1 for ‘standard’mode; n = 2 for ‘double’ mode. The given maximum bandwidth may be shared by up to 4 channels as shown in the following tables for both ‘standard’ and ‘double’ modes and a XTAL frequency of 9.216 MHz. ‘Standard’ mode - XTAL = 9.216 MHz Control of LASER current The LASER output current must be set for each individual device in accordance with the manufacturer’s recommendations. The maximum output current to the Laser is controlled by the resistor Rtrc connected between ground and TRC. The minimum value set on Rtrc to avoid damage to the ACS401 is 800 Ω. LASER(current max) = 100/Rtrc tolerance +/- 25 %. Whilst TRC sets the maximum current ( to prevent damage to the laser during the adjustment procedure), the actual current to the Laser is determined by the external component VR2. The adjustment procedure is described in the following section. Adjustment Procedure Select the appropriate mode using the pins DP(1:4) (see section headed Operational Modes). Choose a value for the resistor Rtrc that delivers sufficient current to correctly drive the laser at the desired power, with sufficient power margin to compensate for temperature/voltage changes and potential laser degradation. In many applications the value of Rtrc will be set to the maximum current using a resistor value of 800 Ω. The output power from the laser may be measured directly using an optical-power meter that is capable of detecting peak optical- power. If an average optical-power meter is employed then a correction factor of 16 must be used to obtain the peak value . LASER(peak power) = Laser(average power) * 16. The external component VR2 should have a range of 0 to 50 K Ω. As VR2 is decreased, output power will first be detected when the laser begins to lase. VR2 should be reduced further until the desired output power is achieved (within the limits of the manufacturer’s specification). LED current control The LED transmit current is less critical though it is important not to exceed the LED manufacturer’s recommendation for maximum current. The current is controlled by a resistor Rtrc connected between TRC and ground. The lower the value Rtrc, the greater the current. The lower limit for Rtrc is 800 Ω while a practical maximum is 40 k Ω. The LED current is inversely proportional to Rtrc while Rtrc > 800 Ω: LED(current) = 100/Rtrc tolerance +/- 25 %. PORB The Power-On Reset or PORB pin resets the device if forced Low for 100 ms or more. In normal operation PORB should be held High. Although the PORB pin has been included, e.g. for factory test, the modem has been designed to power up correctly without the aid of PORB. PORB has a special function when used in conjunction with memory lock (see section headed Diagnostic Modes). Crystal Clock Normally, a parallel resonant crystal will be connected between the pins XLI and XLO with the appropriate padding capacitors. Alternatively, it is possible to drive XLI directly by an external clock. The clock frequency for the purpose of this specification will be known as XTAL frequency. The operational range for XTAL frequency is 1 - 12 MHz, though communicating ACS401s must be clocked at the same nominal frequency. The ACS401 has been designed to operate with a XTAL tolerance of 100 ppm giving a relative tolerance of 200 ppm between communicating modems. The recommended frequency of 9.216 MHz, results in the standard range of synchronous communication frequencies tabulated in the section headed Data Rate Selection. Non- standard frequencies may be generated by using the appropriate value XTALor external clock. |
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