EM773 datasheet(9/45 Pages) NXP

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EM773

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Objective data sheet

Rev. 1 — 1 September 2010

9 of 45

NXP Semiconductors

EM773

Energy metering IC

7.5 Nested Vectored Interrupt Controller (NVIC)

The Nested Vectored Interrupt Controller (NVIC) is an integral part of the Cortex-M0. The

tight coupling to the CPU allows for low interrupt latency and efficient processing of late

arriving interrupts.

7.5.1 Features

• Controls system exceptions and peripheral interrupts.

• In the EM773, the NVIC supports 32 vectored interrupts including up to 13 inputs to

the start logic from individual GPIO pins.

Fig 3.

EM773 memory map

0x5000 0000

0x5001 0000

0x5002 0000

0x5020 0000

AHB peripherals

16-127 reserved

GPIO PIO1

4-7

0x5003 0000

0x5004 0000

GPIO PIO2

GPIO PIO3

8-11

12-15

GPIO PIO0

0-3

APB peripherals

0x4000 4000

0x4000 8000

0x4000 C000

0x4001 0000

0x4001 8000

0x4003 8000

0x4003 C000

0x4004 0000

0x4004 4000

0x4004 8000

0x4004 C000

0x4008 0000

0x4001 C000

0x4001 4000

0x4000 0000

WDT

32-bit counter/timer 0

32-bit counter/timer 1

UART

PMU

I2C-bus

13 - 7 reserved

31 - 19 reserved

reserved

0x0000 0000

0 GB

0.5 GB

4 GB

1 GB

0x1000 2000

0x1FFF 0000

0x1FFF 4000

0x2000 0000

0x4000 0000

0x4008 0000

0x5000 0000

0x5020 0000

0xFFFF FFFF

reserved

APB peripherals

AHB peripherals

8 kB SRAM

0x1000 0000

EM773

0x0000 8000

32 kB on-chip flash

16 kB boot ROM

0x0000 0000

0x0000 00C0

active interrupt vectors

em773_002aae699

SPI0

reserved

16-bit counter/timer 0

IOCONFIG

system control

flash controller

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