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STM32F407IG Datasheet(PDF) 63 Page - STMicroelectronics

Part # STM32F407IG
Description  USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
PDF  154 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F407IG Datasheet(HTML) 63 Page - STMicroelectronics

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STM32F405xx, STM32F407xx
Electrical characteristics
Doc ID 022152 Rev 1
63/154
5.3.6
Supply current characteristics
The current consumption is a function of several parameters and factors such as the
operating voltage, ambient temperature, I/O pin loading, device software configuration,
operating frequencies, I/O pin switching rate, program location in memory and executed
binary code.
The current consumption is measured as described in Figure 19: Current consumption
measurement scheme.
All Run mode current consumption measurements given in this section are performed using
a CoreMark-compliant code.
Typical and maximum current consumption
The MCU is placed under the following conditions:
●
At startup, all I/O pins are configured as analog inputs by firmware.
●
All peripherals are disabled except if it is explicitly mentioned.
●
The Flash memory access time is adjusted to fHCLK frequency (0 wait state from 0 to
30 MHz, 1 wait state from 30 to 60 MHz, 2 wait states from 60 to 90 MHz, 3 wait states
VBOR1
Brownout level 1
threshold
Falling edge
2.13
2.19
2.24
V
Rising edge
2.23
2.29
2.33
V
VBOR2
Brownout level 2
threshold
Falling edge
2.44
2.50
2.56
V
Rising edge
2.53
2.59
2.63
V
VBOR3
Brownout level 3
threshold
Falling edge
2.75
2.83
2.88
V
Rising edge
2.85
2.92
2.97
VBORhyst
(3)
BOR hysteresis
-
100
-
mV
TRSTTEMPO
(3)(4) Reset temporization
0.5
1.5
3.0
ms
IRUSH
(3)
InRush current on
voltage regulator
power-on (POR or
wakeup from Standby)
-
160
200
mA
ERUSH
(3)
InRush energy on
voltage regulator
power-on (POR or
wakeup from Standby)
VDD = 1.8 V, TA = 105 °C,
IRUSH = 171 mA for 31 µs
--
5.4
µC
1.
TBD stands for “to be defined”.
2.
The product behavior is guaranteed by design down to the minimum VPOR/PDR value.
3.
Guaranteed by design, not tested in production.
4.
The reset temporization is measured from the power-on (POR reset or wakeup from VBAT) to the instant
when first instruction is read by the user application code.
Table 15.
Embedded reset and power control block characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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