AM1808 datasheet(7/265 Pages) TI1

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AM1808

www.ti.com

SPRS653B

– FEBRUARY 2010 – REVISED APRIL 2011

Revision History (continued)

See

ADDITIONS/MODIFICATIONS/DELETIONS

Section 5.9.1, EDMA Synchronization Events:

Section 5.9

EDMA

•

Updated Table 5-12.

Section 5.10.5, EMIFA Electrical Data/Timing:

•

Corrected 1.3V, 1.2V MIN value in Table 5-21.

Section 5.22

External Memory Interface A

•

Updated EMA_A[12:0] to EMA_A[22:0] in Figure 5-12 through Figure 5-15.

(EMIFA)

•

Removed unused parameters 29 and 30 from Figure 5-12.

•

Removed unused parameters 31 and 32 from Figure 5-13.

Section 5.11.1, DDR2/mDDR Memory Controller Electrical Data/Timing

•

Corrected 1.3V and 1.2 V MAX values in Table 5-23.

Section 5.11.3.8, Net Classes:

Section 5.11

DDR2/mDDR Controller

•

Corrected Table 5-32 column heading.

Section 5.11.3.11, DDR2/mDDR CK and ADDR_CTRL Routing:

•

Updated Table 5-35.

•

Added last four bullets to list of what SATA Controller supports.

Section 5.14

Section 5.14.2, SATA Interface:

Serial ATA Controller (SATA)

•

Updated values in Figure 5-28.

•

Updated SATA AC coupling capacitor value unit in Table 5-46.

Section 5.17.2.1, Serial Peripheral Interface (SPI) Timing:

•

Added tih(SPC_SOMI)M to Table 5-68.

Section 5.17.2

•

Corrected MAX values and updated table note in Table 5-69.

SPI Electrical Data/Timing

•

Updated table note in Table 5-76

•

Corrected MAX values and changed table note in Table 5-77.

Section 5.20

•

Added Important Notice.

Universal Serial Bus OTG

Section 5.20.2, USB0 [USB2.0] Electrical Data/Timing:

Controller (USB0) [USB2.0

OTG]

•

Added first paragraph.

Section 5.22

Section 5.22.2, EMAC Electrical Data/Timing

Ethernet Media Access

•

Added table note to Table 5-102.

Controller (EMAC)

Section 5.23

Section 5.23.2, Management Data Input/Output (MDIO) Electrical Data/Timing:

Management Data Input/Output

•

Updated MDIO parameters 4 and 5 in Table 5-105.

(MDIO)

•

Added 2nd paragraph.

Section 5.24.1, LCD Interface Display Driver (LIDD Mode):

•

Removed table note for Table 5-108.

Section 5.24

•

Updated description for parameters 12 and 13 in Table 5-109.

LCD Controller (LCDC)

Section 5.24.2, LCD Raster Mode:

•

Updated Figure 5-61.

•

Extended time line in Figure 5-62.

Section 5.29

Table 5-125, eHRPWM Module Control and Status Registers Grouped by Submodule:

Enhanced High-Resolution

Pulse-Width Modulator

•

Updated offset addresses for HRCNFG.

(eHRPWM)

Table 5-131, Timing Requirements for Timer Input:

Section 5.30.1

Timer Electrical Data/Timing

•

Updated table note.

Figure 5-83, Clock Source

Section 5.31.1

Clock Source

•

Replaced Real Time Clock with RTC Power Source.

Section 5.34

•

Added Section 5.34.4, IEEE 1149.1 JTAG.

Emulation Logic

•

Added Section 5.34.5, JTAG 1149.1 Boundary Scan Considerations.

Section 6.1.2, Device Nomenclature:

Section 6.1

Device Support

•

Updated Figure 6-1.

Contents

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