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HT67F60 Datasheet(PDF) 126 Page - Holtek Semiconductor Inc |
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HT67F60 Datasheet(HTML) 126 Page - Holtek Semiconductor Inc |
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126 / 242 page ![]() Rev. 1.50 126 March 06 , 2012 Rev. 1.50 127 March 06 , 2012 HT67F30/HT67F40/HT67F50/HT67F60 TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPRO Counter Value 0x3FF CCRP CCRA TnON TnPAU TnPOL CCRP Int. Flag TnPF CCRA Int. Flag TnAF TM O/P Pin Time CCRA=0 CCRA = 0 Counter overflow CCRA > 0 Counter cleared by CCRA value Pause Resume Stop Counter Restart TnCCLR = 1; TnM [1:0] = 00 Output pin set to initial Level Low if TnOC=0 Output Toggle with TnAF flag Note TnIO [1:0] = 10 Active High Output select Here TnIO [1:0] = 11 Toggle Output select Output not affected by TnAF flag. Remains High until reset by TnON bit Output Pin Reset to Initial value Output controlled by other pin-shared function Output Inverts when TnPOL is high TnPF not generated No TnAF flag generated on CCRA overflow Output does not change Compare Match Output Mode — TnCCLR = 1 Note: 1. With TnCCLR=1 a Comparator A match will clear the counter 2. The TM output pin is controlled only by the TnAF flag 3. The output pin is reset to its initial state by a TnON bit rising edge 4. A TnPF flag is not generated when TnCCLR=1 Timer/Counter Mode To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 11 respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags. The exception is that in the Timer/Counter Mode the TM output pin is not used. Therefore the above description and Timing Diagrams for the Compare Match Output Mode can be used to understand its function. As the TM output pin is not used in this mode, the pin can be used as a normal I/O pin or other pin-shared function. PWM Output Mode To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 10 respectively and also the TnIO1 and TnIO0 bits should be set to 10 respectively. The PWM function within the TM is useful for applications which require functions such as motor control, heating control, illumination control etc. By providing a signal of fixed frequency but of varying duty cycle on the TM output pin, a square wave AC waveform can be generated with varying equivalent DC RMS values. As both the period and duty cycle of the PWM waveform can be controlled, the choice of generated waveform is extremely flexible. In the PWM mode, the TnCCLR bit has no effect as the PWM period. Both of the CCRA and CCRP registers are used to generate the PWM waveform, one register is used to clear the internal counter and thus control the PWM waveform frequency, while the other one is used to control the duty cycle. Which register is used to control either frequency or duty cycle is determined using the TnDPX bit in the TMnC1 register. The PWM waveform frequency and duty cycle can therefore be controlled by the values in the CCRA and CCRP registers. |
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