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MIC3000BML Datasheet(PDF) 51 Page - Micrel Semiconductor |
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MIC3000BML Datasheet(HTML) 51 Page - Micrel Semiconductor |
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51 / 68 page ![]() October 2004 51 M9999-101204 MIC3000 Micrel Data Ready Flags (DATARDY) D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] TRDY VRDY IRDY TXRDY RXRDY read only read only read only read only read only reserved reserved reserved Default Value 0000 0000b = 00h Serial Address A2h = 1010001b Byte Address 254 = FEh When the A/D conversion for a given parameter is completed and the results available to the host, the corresponding data ready flag will be set. The flag will be cleared when the host reads the corresponding result register. Bit(s) Function Operation D[7] TRDY Temperature data ready flag 0 = old data; 1 = new data ready D[6] VRDY Voltage data ready flag 0 = old data; 1 = new data ready D[5] IRDY Bias current data ready flag 0 = old data; 1 = new data ready D[4] TXRDY Transmit power data ready flag 0 = old data; 1 = new data ready D[3] RXRDY Receive power data ready flag 0 = old data; 1 = new data ready D[2:0] Reserved Reserved USER Control Register (USRCTL) D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] PORM PORS IE APCSEL reserved read/write read only read/write read/write read/write reserved reserved Default Value 0010 0000b = 20h Serial Address A2h = 1010001b Byte Address 255 = FFh This register provides for control of the nominal APC setpoint and management of interrupts by the end-user. APCSEL[1:0] select which of the APC setpoint registers, APCSET0, APCSET1, or APCSET2 are used as the nominal automatic power control setpoint. IE must be set for any interrupts to occur. If PORM is set, the power-on event will generate an interrupt and warm resets using RST will not generate a POR interrupt. When a power-on interrupt occurs, assuming PORM=1, PORS will be set. PORS will be cleared and the interrupt output de-asserted when USRCTL is read by the host. If IE is set while / INT is asserted, /INT will be de-asserted. The host must still clear the various status flags by reading them. If PORM is set following the setting of PORS, PORS will remain set, and /INT will not be de-asserted, until USRCTL is read by the host. PORM, IE, and APCSEL are non-volatile and will be maintained through power and reset cycles. A valid USER password is required for access to this register. Bit Function Operation D[7] Reserved Always write as zero; reads undefined. D[6] PORM Power-on interrupt mask 1 = POR interrupts enabled; 0 = disabled; read/write; non-volatile. D[5] PORS Power-on interrupt flag 1 = POR interrupt occurred; 0 = no POR interrupt; read-only. D[4] IE Global interrupt enable 1 = enabled; 0 = disabled; read/write; non-volatile. D[3:2] APCSEL Selects APC setpoint register 00 = APCSET0, 01 = APCSET1, 10 = APCSET2; 11 = reserved; read/write; non-volatile. D[1:0] Reserved Always write as zero; reads undefined. |
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