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MIC3000BML Datasheet(PDF) 57 Page - Micrel Semiconductor

Part # MIC3000BML
Description  FOM Management IC
PDF  68 Pages
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

MIC3000BML Datasheet(HTML) 57 Page - Micrel Semiconductor

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October 2004
57
M9999-101204
MIC3000
Micrel
BYTE
Weight
3
OEM Password, Most Significant Byte
2
OEM Password, 2nd Most Significant Byte
1
OEM Password, 2nd Least Significant Byte
0
OEM Password, Least Significant Byte
OEM Calibration 0 (OEMCAL0)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
FLTDIS
FSPIN
WRINH
APCCAL
FRCINT
FRCTXF
FRCLOS
reserved
read/write
read/write
read/write
read/write
read/write
read/write
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
16 = 10h
A valid OEM password is required for access to this register.
Bit
Function
Operation
D[7]
Reserved
Always write as zero; reads undefined.
D[6]
FLTDIS
Fault comparator disable; inhibits output of fault
0 = faults enabled; 1 = disabled; Read/write.
comparators when set.
D[5]
FSPIN
Fault comparator “spin-on-channel” mode select;
0 = normal operation; 1 = spin on channel;
do not enable ADC and FC spin-on-channel
Read/write.
modes simultaneously.
D[4]
WRINH
Inhibit NVRAM write cycles.
0 = normal operation; 1 = inhibit writes; Read/write.
D[3]
APCCAL
Selects APC calibration mode - DACs may be
0 = normal mode; 1 = calibration mode; Read/write.
controlled directly.
D[2]
FRCINT
Forces the assertion of /INT
0 = normal operation; 1 = asserted; Read/write.
D[1]
FRCTXF
Forces the assertion of TXFAULT
0 = normal operation; 1 = asserted; Read/write.
D[0]
FRCLOS
Forces the assertion of RXLOS
0 = normal operation; 1 = asserted; Read/write.
OEM Calibration 1 (OEMCAL1)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
ADSTP
ADIDL
1SHOT
ADSPIN
SPIN[2]
SPIN[1]
SPIN[0]
reserved
read/write
read/write
read/write
read/write
read/write
read/write
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
17 = 11h
A valid OEM password is required for access to this register.



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