| Electronic Components Datasheet Search |
|
MIC3000BML Datasheet(PDF) 10 Page - Micrel Semiconductor |
|
|
|||||||||||||||||||||||||||||
MIC3000BML Datasheet(HTML) 10 Page - Micrel Semiconductor |
|
10 / 68 page ![]() MIC3000 Micrel M9999-101204 10 October 2004 Electrical Characteristics Symbol Parameter Condition Min Typ Max Units Control and Status I/O Timing, TXFAULT, TXDISABLE, RSIN, RSOUT, and RXLOS tOFF TXDISABLE Assert Time From input asserted to optical output at 10 µs 10% of nominal, CCOMP = 10nF. tON TXDISABLE De-assert Time From input de-asserted to optical output 1 ms at 90% of nominal, CCOMP = 10nF. tINIT Initialization Time From power on or transmitter enabled to 300 ms optical output at 90% of nominal and TX_FAULT de-asserted.(4) tINIT2 Power-on Initialization Time From power on to APC loop enabled. 200 ms tFAULT TXFAULT Assert Time From fault condition to TXFAULT 95 µs assertion.(4) tRESET Fault Reset Time Length of time TXDISABLE must be 10 µs asserted to reset fault condition. tLOSS_ON RXLOS Assert Time From loss of signal to RXLOS asserted. 95 µs tLOSS_OFF RXLOS De-assert Time From signal acquisition to LOS 100 µs de-asserted. tDATA Analog Parameter Data Ready From power on to valid analog parameter 400 ms data available.(4) tPROP_IN TXFAULT, TXDISABLE, RXLOS, Time from input change to corresponding 1 µs RSIN Input Propagation Time internal register bit set or cleared.(4) tPROP_OUT TXFAULT, RSOUT, /INT Output From an internal register bit set or cleared 1 µs Propagation Time to corresponding output change.(4) Fault Comparators φ FLTTMR Fault Suppression Timer Clock Note 4 0.475 0.5 0.525 ms Period Accuracy -3 +3 %F.S. tREJECT Glitch Rejection Maximum length pulse that will not cause 4.5 µs output to change state.(4) VSAT Saturation Detection Threshold High level 95 %VDDA Low level 5 %VDDA Power-On Hour Meter Timebase Accuracy 0°C - TA - +70°C(4) +5 –5 % –40°C - TA - +105°C +10 –10 % Resolution Note 4 10 hours Non-Volatile (FLASH) Memory tWR Write Cycle Time(8) From STOP of a one to four-byte write 13 ms transaction.(4) Data Retention 100 years Endurance Minimum Permitted Number Write 10,000 cycles Cycles |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |