PSB7280 datasheet(70/190 Pages) SIEMENS

70 / 190 page

PSB 7280

Semiconductor Group

Data Sheet 1998-07-01

The following status bits are provided:

The HDLC transmitter is controlled by the following bits:

After up to 32 bytes have been written to the FIFO, transmission is started by issuing the

XF command. The opening flag (in the case of HDLC) is generated automatically. The

HDLC controller requests another data block by an XPR interrupt status if there are no

more than 32 bytes in the FIFO and the frame close command bit XME has not been set.

To this the software responds by writing another pool of data and issuing a transmit

command XF for that data. If transmission of earlier data (or of a previous frame) is still

underway when a new transmission command XF is issued, software access to the FIFO

is blocked until the first transmission is completed (see Figure 28).

XDOV

Transmit Data Overflow

Indicates that more than 32 bytes have been written into the transmit FIFO.

Transmit Frame

Initiates transmission of an entire frame, or part of one (up to 32 bytes).

XME

Transmit Message End

Indicates that after the transmission of data from the FIFO pool, the frame

is to be closed with a closing flag (and possibly a CRC checksum).

XRES

Transmitter Reset

Resets the HDLC transmitter, clears the transmit FIFO, aborts any HDLC

frame being transmitted and generates an XPR status after the command

has been completed.

XNEW

Transmitter Restart

Resets the transmitter state machine without any loss of data (i.e. FIFO

data). The transmission of the current frame can be restarted with the first

bit of the start flag.

PSB7280 Datasheet(PDF) 70 Page - Siemens Semiconductor Group