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CDCM9102 Datasheet(PDF) 14 Page - Texas Instruments |
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CDCM9102 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 22 page ![]() LVPECL Vb 150 (2) W 50 (2) W LVDS LVDS 100 W LVDS 100 W LVCMOS 22 W LVCMOS CDCM9102 SCAS922 – FEBRUARY 2012 www.ti.com Figure 16. LVPECL Output Termination (AC-Coupled) LVDS TERMINATION The proper LVDS termination for signal integrity over two 50- Ω lines is 100 Ω between the outputs on the receiver end. Either a direct-coupled (dc) termination or ac-coupled termination can be used for LVDS outputs, as shown in Figure 17 and Figure 18. It is recommended to place all resistive components close to either the driver end or the receiver end. If the supply voltages of the driver and receiver are different, ac coupling is required. Figure 17. LVDS Output Termination (DC Coupled) Figure 18. LVDS Output Termination (AC Coupling) LVCMOS TERMINATION Series termination is a common method to maintain the signal integrity for LVCMOS drivers, if connected to a receiver with a high-impedance input. For series termination, a series resistor, Rs, is placed close to the driver, as shown in Figure 19. The sum of the driver impedance and Rs should be close to the transmission-line impedance, which is usually 50 Ω. Because the LVCMOS driver in the CDCM9102 has an impedance of 30 Ω, Rs is recommended to be 22 Ω to maintain proper signal integrity. Figure 19. LVCMOS Output Termination 14 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): CDCM9102 |
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