LTC3829 datasheet(29/54 Pages) LINER

29 / 54 page

LTC3838

3838fa

Figure 8. Setup for VIN ≤ 5.3V

DRVCC2

LTC3838

DRVCC1

CDRVCC

RDRVCC

3838 F08

VIN

CIN

APPLICATIONS INFORMATION

For applications where the main input power never exceeds

5.3V, tie the DRVCC1 and DRVCC2 pins to the VIN input

through a small resistor, (such as 1Ω to 2Ω) as shown

in Figure 8 to minimize the voltage drop caused by the

gate charge current. This will override the LDO and will

prevent DRVCC from dropping too low due to the dropout

voltage. Make sure the DRVCC voltage exceeds the RDS(ON)

test voltage for the external MOSFET which is typically at

4.5V for logic-level devices.

Generally for VIN>6V,aUVLOcanbesetthroughmonitoring

the VIN supply by using external voltage dividers at the RUN

pins from VIN to SGND. To design the voltage divider, note

that both RUN pins have two levels of threshold voltages.

The precision gate-drive-enable threshold voltage of 1.2V

can be used to set a VIN to turn on a channel’s switching.

If resistor dividers are used on both RUN pins, when VIN

is low enough and both RUN pins are pulled below the

~0.8V threshold, the part will shut down all bias of INTVCC

and DRVCC and be put in micropower shutdown mode.

The RUN pins’ bias currents depend on the RUN voltages.

The bias current changes should be taken into account

when designing the external voltage divider UVLO circuit.

An internal proportional-to-absolute-temperature (PTAT)

pull-up current source (~1.2μA at 25°C) is constantly con-

nected to this pin. When a RUN pin rises above 1.2V, the

corresponding channel’s TG and BG drives are turned on

and an additional 5μA temperature-independent pull-up

current is connected internally to the RUN pin. Pulling the

RUN pin to fall below 1.2V by more than an 80mV hyster-

esis turns off TG and BG of the corresponding channel,

and the additional 5μA pull-up current is disconnected.

As voltage on a RUN pin increases, typically beyond 3V,

its bias current will start to reverse direction and flow into

the RUN pin. Keep in mind that neither of the RUN pins

can sink more than 50μA; Even if a RUN pin may slightly

exceed 6V when sinking 50μA, a RUN pin should never

be forced to higher than 6V by a low impedance voltage

source to prevent faulty conditions.

Soft-Start and Tracking

The LTC3838 has the ability to either soft-start by itself

with a capacitor or track the output of another channel or

an external supply. Note that the soft-start and tracking

features are achieved not by limiting the maximum output

current of the controller, but by controlling the output ramp

voltage according to the ramp rate on the TRACK/SS pin.

Input Undervoltage Lockout (UVLO)

The LTC3838 has two functions that help protect the con-

troller in case of input undervoltage conditions. An internal

UVLO comparator constantly monitors the INTVCC and

DRVCC voltages to ensure that adequate voltages are pres-

ent. The comparator enables internal UVLO signal, which

locks out the switching action of both channels, until the

INTVCC and DRVCC1,2 pins are all above their respective

UVLO thresholds. The rising threshold (to release UVLO)

of the INTVCC is typically 4.2V, with 0.5V falling hysteresis

(to re-enable UVLO). The UVLO thresholds for DRVCC1,2are

lower than that of INTVCC but higher than typical threshold

voltages of power MOSFETs, to prevent them from turning

on without sufficient gate drive voltages.

LTC3829 Datasheet(PDF) 29 Page - Linear Technology

LTC3829 Datasheet(HTML) 29 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

Datasheet Download

Link URL