LTC3829 datasheet(4/54 Pages) LINER

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LTC3838

3838fa

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating

junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted (Note 3).

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Current Sensing

VSENSE(MAX)1,2

Maximum Valley Current Sense Threshold

(VSENSE1,2+ – VSENSE1,2–)

VRNG = 2V, VFB = 0.57V, VSENSE– = 2.5V

VRNG = 0V, VFB = 0.57V, VSENSE– = 2.5V

VRNG = INTVCC, VFB = 0.57V, VSENSE– = 2.5V

100

120

VSENSE(MIN)1,2

Minimum Valley Current Sense Threshold

(VSENSE1,2+ – VSENSE1,2–)

(Forced Continuous Mode)

VRNG = 2V, VFB = 0.63V, VSENSE– = 2.5V

VRNG = 0V, VFB = 0.63V, VSENSE– = 2.5V

VRNG = INTVCC, VFB = 0.63V, VSENSE– = 2.5V

–50

–15

–25

ISENSE1,2+

SENSE1,2+ Pins Input Bias Current

VSENSE+ = 0.6V

VSENSE+ = 5V

±5

±50

±2

μA

ISENSE1,2–

SENSE1,2– Pins Input Bias Current

(Internal 500k Resistor to SGND)

VSENSE– = 0.6V

VSENSE– = 5V

1.2

μA

Start-Up and Shutdown

VRUN1,2

RUN Pin On Threshold

VRUN1,2 Rising

1.1

1.2

1.3

RUN Pin On Hysteresis

VRUN1,2 Falling from On Threshold

100

IRUN1,2

RUN Pin Pull-Up Current when Off

RUN1,2 = SGND

1.2

μA

RUN Pin Pull-Up Current Hysteresis

IRUN1,2(HYS) = IRUN1,2(ON) – IRUN1,2(OFF)

5μA

UVLO

INTVCC Undervoltage Lockout

INTVCC Falling

INTVCC Rising

3.3

3.7

4.2

4.5

ITRACK/SS1,2

Soft-Start Pull-Up Current

0V < TRACK/SS1,2 < 0.6V

μA

Frequency and Clock Synchronization

Clock Output Frequency

(Steady-State Switching Frequency)

RT = 205k

RT = 80.6k

RT = 18.2k

450

200

500

2000

550

kHz

Channel 2 Phase (Relative to Channel 1)

PHASMD = SGND

PHASMD = Floating

PHASMD = INTVCC

180

240

Deg

CLKOUT Phase (Relative to Channel 1)

PHASMD = SGND

PHASMD = Floating

PHASMD = INTVCC

120

Deg

VPLLIN(H)

Clock Input High Level Into MODE/PLLIN

VPLLIN(L)

Clock Input Low Level Into MODE/PLLIN

0.5

RMODE/PLLIN

MODE/PLLIN Input DC Resistance

With Respect to SGND

600

kΩ

Gate Drivers

RTG(UP)1,2

TG Driver Pull-Up On Resistance

TG High

2.5

RTG(DOWN)1,2

TG Driver Pull-Down On Resistance

TG Low

1.2

RBG(UP)1,2

BG Driver Pull-Up On Resistance

BG High

2.5

RBG(DOWN)1,2

BG Driver Pull-Down On Resistance

BG Low

0.8

tD(TG/BG)1,2

Top Gate Off to Bottom Gate On Delay Time (Note 6)

tD(BG/TG)1,2

Bottom Gate Off to Top Gate On Delay Time (Note 6)

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