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MC34708 Datasheet(PDF) 27 Page - Freescale Semiconductor, Inc |
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MC34708 Datasheet(HTML) 27 Page - Freescale Semiconductor, Inc |
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27 / 159 page ![]() Analog Integrated Circuit Device Data 27 Freescale Semiconductor MC34708 Functional Block Description 7.3.2 SRTC Support When configured for DRM mode (SPI bit DRM = 1), the CLK32KMCU driver will be kept enabled through all operational states to ensure that the SRTC module always has its reference clock. If DRM = 0, the CLK32KMCU driver will not be maintained in the Off state. It is also necessary to provide a means for the processor to do an RTC initiated wake-up of the system if it has been programmed for such capability. This can be accomplished by connecting an open drain NMOS driver to the PWRON pin of the MC34708 PMIC, so that it is in effect, a parallel path for the power key. The MC34708 PMIC will not be able to discern the turn on event from a normal power key initiated turn on, but the processor should have the knowledge, since the RTC initiated turn on is generated locally. Table 15. Oscillator and Clock Main Electrical Specifications Characteristics noted under conditions BP = 3.6 V, VBUS = 5.0 V, -40 C TA 85 C, unless otherwise noted. Typical values at BP = 3.6 V and TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min Typ Max Unit Notes OSCILLATOR AND CLOCK OUTPUT VINRTC Operating Voltage • Oscillator and RTC Block from BP • Oscillator and RTC Block from LICELL 1.8 1.8 - - 4.5 3.6 V IINRTC Operating Current Crystal Oscillator and RTC Module • All blocks disabled, no main battery attached, coin cell is attached to LICELL - 2.0 5.0 A tSTART-RTC RTC oscillator startup time • Upon application of power - - 1.0 sec VRTCLO Output Low • CLK32K Output sink 100 A • CLK32KMCU Output source 50 A 0.0 - 0.2 V VRTCHI Output High • CLK32K Output source 100 A • CLK32KMCU Output sink 50 A CLK32K VCC -0.2 VSRTC-0.2 - CLK32K VCC VSRTC V tCLK32KET CLK32K Rise and Fall Time, CL = 50 pF • CLK32KDRV [1:0] = 00 • CLK32KDRV [1:0] = 01 (default) • CLK32KDRV [1:0] = 10 • CLK32KDRV [1:0] = 11 - - - - 6.0 2.5 3.0 2.0 - - - - ns tCKL32K MCUET CLK32KMCU Rise and Fall Time •CL = 12 pF - 22 - ns CLK32KDC/ CLK32K MCUDC CLK32K and CLK32KMCU Output Duty Cycle • Crystal on XTAL1, XTAL2 pins 45 - 55 % RMS Output Jitter • 1 Sigma for Gaussian distribution - - 30 ns RMS |
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