SNAD01B datasheet(10/31 Pages) SONIX

10 / 31 page

SNAD01B

8-CHANNEL 8-BIT ADC

Power Down & Channel Wake-Up

SNAD01 enters into

power-down mode

START

CLK

DIO

Figure7 The timing diagram of power down command

START

CLK

CH n

DIO

Wake-Up

Host CPU

HiZ

Wake-Up

Procedure Ending

Figure8 The timing diagram of power down command

1. The power down command (000/111) is sent to SNAD01B in the first three cycles, and

then SNAD01B enters into power down mode at the 5th clock cycle, consuming almost no

current (less than 1uA).

2. After SNAD01B enters power down (mode 0: command 000), SNAD01B sends “0” out to

DIO until a valid logic transition appears on any wakeup-enabled digital input channel. Once

the transition occurs, SNAD01B toggles DIO to “1” to inform host controller. After receiving

“1” from DIO, host controller should turn START back to “1” to inform SNAD01B that the

power-down stage is over. Otherwise, SNAD01B keeps sending out “1” to DIO and does not

recognize any other transitions on any channels.

Version: 1.3

July 31, 2003

SNAD01B Datasheet(PDF) 10 Page - SONiX Technology Company