SNAD02C

8-CHANNEL 10-BIT ADC

6.2. Channel Setting

CLK

START

Channel Setting

HiZ

CM2

CM1

CM0

CH[7] CH[6] CH[5] CH[4]

CH[3] CH[2] CH[1]

CH[0]

X

XX

X

X

DIO

Port Input

Figure-4 The timing diagram of channel attribute/wakeup setting

(1) Command 001: channel attribute setting.

(2) Command 010: wakeup function setting.

In attribute setting, “1” means analog and “0” means digital. In wakeup setting, “1” means enable

and “0” means disable. After all of the channels are set, the DIO port remains input mode and all

the following data are ignored.

6.3. Control Register Setting

CLK

START

Control Register Setting

HiZ

CM2

CM

1

CM0

PH

PL

RF

MB

X

X

X

X

X

XX

X

X

DIO

Port Input

Figure-5 The timing diagram of control registers setting

(1) Command ID: (011)

(2) 4-bit data behind command ID are loaded into control registers with the sequence of PH, PL,

RF and MB.

(3) The function of each control registers are as Table-3.

Version: 1.3

July 31, 2003

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