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PTH08T255WAS Datasheet(PDF) 25 Page - Texas Instruments |
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PTH08T255WAS Datasheet(HTML) 25 Page - Texas Instruments |
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25 / 35 page ![]() Current Sharing and TurboTrans™ PTH08T255W www.ti.com ........................................................................................................................................................................................... SLTS290 – NOVEMBER 2008 Table 7. Required Connections for Current Sharing(1) TERMINAL MASTER SLAVE NAME NO. VI 6,7,14,15 Connect to the Input Bus. Connect to the Input Bus. VO 10,11 Connect to the Output Bus. Connect to the Output Bus. GND 8,9,12,13 Connect to Common Power GND. Connect to Common Power GND. Inhibit and Use for Inhibit control & UVLO adjustments. If 21 No Connection. Leave open-circuit. UVLO unused leave open-circuit. Use to set the output voltage. Connect RSET Vo Adjust 18 No Connection. Leave open-circuit. resistor between this pin and AGND (pin 4). Connect to the output voltage either at the load or +Sense 17 No Connection. Leave open-circuit. at the module (pin 11). Connect to the output GND either at the load or at –Sense 16 No Connection. Leave open-circuit. the module (pin 13). Track 20 Connect to Track control or to VI (pin 15). No Connection. Leave open-circuit. Connect TurboTrans resistor, RTT, between this pin TurboTrans™ 19 No Connection. Leave open-circuit. and +Sense (pin 17). Connect to an external clock. If unused connect to SmartSync 22 Connect to Common Power GND. GND. CONFIG 1 Connect to GND. (2) Connect to the Input Bus. Share 2 Connect to pin 2 of Slave. (2) Connect to pin 2 of Master. Comp 3 Connect to pin 3 of Slave. (2) Connect to pin 3 of Master. AGND 4 Connect to pin 4 of Slave. (3) Connect to pin 4 of Master. CLKIO 5 Connect to pin 5 of Slave. (2) Connect to pin 5 of Master. (1) For more details on the pin descriptions, please refer to the 'Terminal Functions' described in Table 1 (2) See Layer A in Figure 22 for recommended layout (3) See Layer B in Figure 22 for recommended layout When using TurboTrans while paralleling two modules, the TurboTrans resistor, RTT, must be connected from the TurboTrans pin (pin 19) of the Master module to the +Sense pin (pin 17) of the Master module. When paralleling modules the procedure to calculate the proper value of output capacitance and RTT is similar to that explained in the TurboTrans Selection section, however the values must be calculated for a single module. Therefore, the total output current load step must be halved before determining the required output capacitance and the RTT value as explained in the TurboTrans Selection section. The value of output capacitance calculated is the minimum required output capacitance per module and the value of RTT must be calculated using this value of output capacitance. The TurboTrans pin of the Slave module must be left open. As an example, let's look at a 12-V application requiring a 40 mV deviation during a 20 A load transient. A majority of 470 µF, 10 mΩ output capacitors are used. Use the 12 V, Type B capacitor chart, Figure 7. First, halving the load transient gives 10 A. Dividing 40 mV by 10 A gives 4 mV/A transient voltage deviation per amp of transient load step. Select 4 mV/A on the Y-axis and read across to the 'With TurboTrans' plot. Following this point down to the X-axis gives us a minimum required output capacitance of approximately 1800 µF. This is the minimum required output capacitance per module. Hence, the total minimum output capacitance would be 2 × 1800 µF = 3600 µF. The required R TT resistor value for 1800 µF can then be calculated or selected from Table 4. The required RTT resistor is approximately 26.7 kΩ. Copyright © 2008, Texas Instruments Incorporated 25 Product Folder Link(s): PTH08T255W |
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