TPS65921 datasheet(35/58 Pages) TI1

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32 kHz

32KXIN

32KXOUT

32-kHz

OSC

IO_1P8

(1.8 V)

32KCLKOUT

RTC

SWCS048-014

PL_HR resistance

CDM

clamp

HFCLKIN

HFCLKOUT

PWRDN, PWRSEL

BYPASS, PWRDN, PWRSEL

SWCS048-015

TPS65921

www.ti.com

SWCS048F – MARCH 2010 – REVISED MARCH 2012

Figure 12. 32.768-kHz Clock Output Block Diagram

The TPS65921 device has an internal 32.768-kHz oscillator connected to an external 32.768-kHz crystal through

the 32KXIN/32KXOUT balls or an external digital 32.768-kHz clock through the 32KXIN input (see Figure 12).

The TPS65921 device also generates a 32.768-kHz digital clock through the 32KCLKOUT pin and can broadcast

it externally to the application processor or any other devices. The 32KCLKOUT clock is broadcast by default in

the TPS65921 active mode but can be disabled if it is not used.

The 32.768-kHz clock (or signal) is also used to clock the RTC (real-time clock) embedded in the TPS65921.

The RTC is not enabled by default. It is up to the host processor to set the correct date and time and to enable

the RTC functionality.

The 32KCLKOUT output buffer can drive several devices (up to 40-pF load). At start-up, the 32.768-kHz output

clock (32KCLKOUT) must be stabilized (frequency/duty cycle) prior to the signal output. Depending on the start-

up condition, this may delay the start-up sequence.

CLOCK SLICER

Figure 13 shows the clock slicer block diagram.

Figure 13. Clock Slicer Block Diagram

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TPS65921 Datasheet(PDF) 35 Page - Texas Instruments