TUSB8040A datasheet(29/39 Pages) TI1

29 / 39 page

TUSB8020A, TUSB8040A

www.ti.com

SLLSEA7B – MAY 2012 – REVISED AUGUST 2012

3.4.16 Manufacturer String Registers

Table 3-32. Register Offset 50h-8Fh

Bit No.

Reset State

Table 3-33. Bit Descriptions – Manufacturer String Registers

Bit

Field Name

Access

Description

Manufacturer string byte N. These registers provide the string values

returned for string index 3 when mfgStringLen is greater than 0. The

number of bytes returned in the string is equal to mfgStringLen. The

7:0

mfgStringByte[n]

programmed data should be in UNICODE UTF-16LE encodings as

defined by The Unicode Standard, Worldwide Character Encoding,

Version 5.0.

3.4.17 Product String Registers

Table 3-34. Register Offset 90h-CFh

Bit No.

Reset State

Table 3-35. Bit Descriptions – Product String Registers

Bit

Field Name

Access

Description

Product string byte N. These registers provide the string values returned

for string index 2 when prodStringLen is greater than 0. The number of

7:0

prodStringByte[n]

bytes returned in the string is equal to prodStringLen. The programmed

data should be in UNICODE UTF-16LE encodings as defined by The

Unicode Standard, Worldwide Character Encoding, Version 5.0.

3.4.18 Device Status and Command Register

Table 3-36. Register Offset F8h

Bit No.

Reset State

Table 3-37. Bit Descriptions – Device Status and Command Register

Bit

Field Name

Access

Description

7:2

RSVD

Reserved. Read only, returns 0 when read.

SMBus interface reset. This bit resets the SMBus slave interface to its

default state and loads the registers back to their GRSTz values. This bit

smbusRst

RSU

is set by writing a 1 and is cleared by hardware on completion of the

reset. A write of 0 has no effect. (Not used with I2C)

Configuration active. This bit indicates that configuration of the

TUSB80x0A is currently active. The bit is set by hardware when the

device enters the I2C or SMBus mode. The TUSB80x0A does not

connect on the upstream port while this bit is 1.When in I2C mode, the bit

cfgActive

RCU

is cleared by hardware when the TUSB80x0A exits the I2C mode. When

in the SMBus mode, this bit must be cleared by the SMBus host in order

to exit the configuration mode and allow the upstream port to connect.

The bit is cleared by a writing 1. A write of 0 has no effect.

FUNCTIONAL DESCRIPTION

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