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L99PM62XP Datasheet(PDF) 61 Page - STMicroelectronics |
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L99PM62XP Datasheet(HTML) 61 Page - STMicroelectronics |
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61 / 98 page ![]() L99PM62XP Electrical specifications Doc ID 16363 Rev 3 61/98 DO The voltages are referred to ground and currents are assumed positive, when the current flows into the pin. 6 V < VS < 18 V; 4.5 V < V1 < 5.3 V; all outputs open; Tj = -40 °C to 130 °C, unless otherwise specified. DO timing The voltages are referred to ground and currents are assumed positive, when the current flows into the pin. 6 V < VS < 18 V; 4.5 V < V1 < 5.3 V; all outputs open; Tj = -40 °C to 130 °C, unless otherwise specified. Table 36. DI timing(1) 1. See Figure 30. Symbol Parameter Test condition Min. Typ. Max. Unit tCLK Clock period V1 = 5 V 1000 - ns tCLKH Clock high time V1 = 5 V 400 - ns tCLKL Clock low time V1 = 5 V 400 - ns tset CSN CSN setup time, CSN low before rising edge of CLK V1 = 5 V 400 - ns tset CLK CLK setup time, CLK high before rising edge of CSN V1 = 5 V 400 - ns tset DI DI setup time V1 = 5 V 200 - ns thold DI DI hold time V1 = 5 V 200 - ns tr in Rise time of input signal DI, CLK, CSN V1 = 5 V - 100 ns tf in Fall time of input signal DI, CLK, CSN V1 = 5 V - 100 ns Table 37. DO output pin Symbol Parameter Test condition Min. Typ. Max. Unit VDOL Output low level V1 = 5 V, ID = -4 mA 0.5 V VDOH output high level V = 5 V, ID = 4 mA 4.5 V IDOLK 3-state leakage current VCSN = V1, 0 V < VDO < V1 -10 10 µA CDO 2 3-state input capacitance VCSN = V1, 0 V < V1 < 5.3 V 10 15 pF Table 38. DO timing(1) Symbol Parameter Test condition Min. Typ. Max. Unit tr DO DO rise time CL = 100 pF, ILOAD = -1 mA - 50 100 ns tf DO DO fall time CL = 100 pF, ILOAD = 1 mA - 50 100 ns ten DO tri L DO enable time from 3-state to low level CL = 100 pF, ILOAD = 1 mA pull-up load to V1 -50 250 ns |
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