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L99PM62XP Datasheet(PDF) 62 Page - STMicroelectronics |
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L99PM62XP Datasheet(HTML) 62 Page - STMicroelectronics |
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62 / 98 page ![]() Electrical specifications L99PM62XP 62/98 Doc ID 16363 Rev 3 CSN timing The voltages are referred to ground and currents are assumed positive, when the current flows into the pin. 6 V < VS < 18 V; 4.5 V < V1 < 5.3 V; all outputs open; Tj = -40 °C to 130 °C, unless otherwise specified. 5.5.15 Inputs TxD_C and TxD_L for Flash mode 6V ≤ Vs ≤ 18 V; 4.5 V ≤ V 1 ≤ 5.3 V; T j = -40 °C to 130 °C, voltages are referred to PGND, all outputs open tdis DO L tri DO disable time from low level to 3-state CL = 100 pF, ILOAD = 4 mA pull-up load to V1 -50 250 ns ten DO tri H DO enable time from 3-state to high level CL = 100 pF, ILOAD = -1 mA pull-down load to GND -50 250 ns tdis DO H tri DO disable time from high level to 3-state CL = 100 pF, ILOAD = -4 mA pull-down load to GND -50 250 ns td DO DO delay time VDO < 0.3 V1, VDO > 0.7 V1, CL = 100 pF -50 250 ns 1. See Figure 31 and Figure 32. Table 39. CSN timing(1) 1. See Figure 33. Symbol Parameter Test Condition Min. Typ. Max. Unit tCSN_HI,min Minimum CSN HI time, active mode Transfer of SPI-command to Input register 6µs tCSNfail CSN low timeout Tested by scan chain 20 35 50 ms Table 38. DO timing(1) (continued) Symbol Parameter Test condition Min. Typ. Max. Unit Table 40. Inputs TxD_C and TxD_L for Flash mode Symbol Parameter Test condition Min. Typ. Max. Unit VFlashL Input low level (VTXDC/L rising) V1 = 5 V 6.17.258.4 V VFlashH Input high level (VTXDC/L falling) V1 = 5 V 7.4 8.4 9.4 V VFlashHYS Input Voltage Hysteresis V1 = 5 V 0.6 0.8 1.0 V |
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