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WM8860 Datasheet(PDF) 121 Page - Wolfson Microelectronics plc |
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WM8860 Datasheet(HTML) 121 Page - Wolfson Microelectronics plc |
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121 / 184 page  Pre-Production WM8860 w PP, April 2011, Rev 3.2 121 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h 14h 15h 16h 17h PGA CONTROL VERB (VENDOR-SPECIFIC Verb ID Payload [7:0] Response[31:0] Get FB2h 00h Bits [31:0] in the table below Set1 7B2h Bits [7:0] in the table below 00000000h Set2 7B3h Bits [15:0] in the table below 00000000h Bit Bitfield Name RW Default Description [31:14] Rsvd R 00000h Reserved [13:0] Terminal Count RW 1FFFh Set the period of the zero detect timeout clock: 0000h = Timeout disabled 0001h to 03FFh = Reserved 0400h = 1025 x 20.833µs (21.3ms) 0401h = 1026 x 20.833µs (21.4ms) … 1FFFh = 8192 × 20.833µs (171ms) … 3FFFh = 16384 × 20.833µs (341ms) Note: The timeout clock uses the SYNC signal from the HDA interface, so the absolute value of the timeout period will depend on the absolute accuracy of the SYNC signal. |
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