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WM8311 Datasheet(PDF) 194 Page - Wolfson Microelectronics plc |
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WM8311 Datasheet(HTML) 194 Page - Wolfson Microelectronics plc |
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194 / 302 page ![]() WM8311 Pre-Production w PP, May 2012, Rev 3.1 194 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R16402 (4012h) Interrupt Status 2 15 CHG_BATT_H OT_EINT 0 Battery Hot interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 14 CHG_BATT_C OLD_EINT 0 Battery Cold interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 13 CHG_BATT_F AIL_EINT 0 Battery Fail interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 12 CHG_OV_EINT 0 Battery Overvoltage interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 11 CHG_END_EI NT 0 Battery Charge End interrupt (End of Charge Current threshold reached) (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 10 CHG_TO_EINT 0 Battery Charge Timeout interrupt (Charger Timer has expired) (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 9 CHG_MODE_E INT 0 Battery Charge Mode interrupt (Charger Mode has changed) (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 8 CHG_START_ EINT 0 Battery Charge Start interrupt (Charging has started) (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 7 CS2_EINT 0 Current Sink 2 interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 6 CS1_EINT 0 Current Sink 1 interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 5 OTP_CMD_EN D_EINT 0 OTP / ICE Command End interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 4 OTP_ERR_EIN T 0 OTP / ICE Command Fail interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 2 PS_POR_EINT 0 Power On Reset interrupt (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 1 PS_SLEEP_O FF_EINT 0 SLEEP or OFF interrupt (Power state transition to SLEEP or OFF states) (Rising Edge triggered) Note: Cleared when a ‘1’ is written. 0 PS_ON_WAKE _EINT 0 ON or WAKE interrupt (Power state transition to ON state) (Rising Edge triggered) Note: Cleared when a ‘1’ is written. Register 4012h Interrupt Status 2 |
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