RT8167A datasheet(33/40 Pages) RICHTEK

33 / 40 page

RT8167A

DS8167A-00

January 2012

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Loop Compensation

Optimized compensation of the CORE VR allows for best

possible load step response of the regulator's output. A

type-I compensator with one pole and one zero is adequate

for a proper compensation. Figure 10 shows the

compensation circuit. It was previously mentioned that to

determine the resistive feedback components of error

amplifier gain, C1 and C2 must be calculated for the

compensation. The target is to achieve constant resistive

output impedance over the widest possible frequency

range.

The pole frequency of the compensator must be set to

compensate the output capacitor ESR zero :

where C is the capacitance of the output capacitor and RC

is the ESR of the output capacitor. C2 can be calculated

as follows :

The zero of compensator has to be placed at half of the

switching frequency to filter the switching-related noise.

Such that,

TON Setting

High frequency operation optimizes the application by

trading off efficiency due to higher switching losses with

smaller component size. This may be acceptable in ultra-

portable devices where the load currents are lower and

the controller is powered from a lower voltage supply. Low

frequency operation offers the best overall efficiency at

SENSE, HOT

NTC, HOT

NTC, COLD

SENSE, COLD

SENSE, HOT

SENSE, COLD

R1b

(R1a // R

) (R1a // R

)

×−

⎛⎞

−

⎜⎟

⎝⎠

(8)

2C R

×π × ×

(9)

(10)

(11)

()

NTC, 25 C

R1b R1a // R

+× π ×

Since the DCR of inductor is temperature dependent, it

affects the output accuracy in high temperature conditions.

Temperature compensation is recommended for the

lossless inductor DCR current sense method. Figure 10

shows a simple but effective way of compensating the

temperature variations of the sense resistor using an NTC

thermistor placed in the feedback path.

Figure 10. Loop Setting with Temperature Compensation

Usually, R1a is set to equal RNTC (25

°C), while R1b is

selected to linearize the NTC's temperature characteristic.

For a given NTC, the design would be to obtain R1b and

R2 and then C1 and C2. According to (2), to compensate

the temperature variations of the sense resistor, the error

amplifier gain (AV) should have the same temperature

coefficient with RSENSE. Hence

From (2), we can have Av at any temperature (T) as

The standard formula for the resistance of NTC thermistor

as a function of temperature is given by :

where RNTC, 25 is the thermistor's nominal resistance at

room temperature,

β (beta) is the thermistor's material

constant in Kelvins, and T is the thermistor's actual

temperature in Celsius.

The DCR value at different temperatures can be calculated

using the equation below :

DCRT = DCR25 x [1+0.00393 x (T-25)]

(6)

where 0.00393 is the temperature coefficient of copper.

For a given NTC thermistor, solving (4) at room temperature

(25

°C) yields

V, HOT

SENSE, HOT

V, COLD

SENSE, COLD

(3)

V, T

NTC, T

R1a / /R

R1b

(4)

(

) ( )

{

}

T+273

298

NTC, T

NTC, 25

⎡⎤

β−

⎢⎥

⎣⎦

(5)

VCC_SENSE

VSS_SENSE

FBx

RGNDx

COMPx

R1b

R1a

NTC

VREFx

R2 = AV, 25 x (R1b + R1a // RNTC, 25)

(7)

where AV, 25°C is the error amplifier gain at room temperature

obtained from (2). R1b can be obtained by substituting

(7) to (3),

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